IBM System x3400 M3 (Withdrawn) Product Guide (withdrawn product)

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The IBM system x3400 m3 support DDR3 memory. The server corroborate up to eight-spot DIMMs when one processor be install and up to sixteen DIMMs when two processor exist install. however, the maximum count of DIMMs exist limited by the number of rank indium the DIMMs :

RDIMMs
- Up to 16 single-rank RDIMMs for a maximum of 64 GB (16x 4 GB)
- Up to 16 dual-rank RDIMMs for a maximum of 128 GB (16x 8 GB)
UDIMMs
- Up to 16 single-rank UDIMMs for a maximum of 16 GB (16x 1 GB)
- Up to 16 dual-rank UDIMMs for a maximum of 64 GB (16x 4 GB)

each central processing unit accept trey memory channel, two of which contain trey DIMMs per duct and the third gear control deuce DIMMs. RDIMMs can beryllium populate up to three per channel. however, UDIMMs can only be populated two DIMMs per distribution channel. That constitute, you can have up to sixteen RDIMMs install in the server, merely only up to twelve UDIMMs. blend UDIMMs and RDIMMs embody not supported.

maximal memory rush be limited by memory accelerate support by the specific central processing unit ( that cost, if the central processing unit only documentation 1066 megahertz, then the memory amphetamine can not exceed 1066 megahertz in any case ) and by the number and type of DIMMs install ( any be broken ), ampere follow :

Intel Xeon 5600 series processors:
- 1333 MHz when one or two single-rank or dual-rank RDIMMs per channel are installed or one UDIMM per channel is installed
- 1066 MHz when two UDIMMs per channel are installed
- 800 MHz when three single-rank or dual-rank RDIMMs per channel are installed
Quad-core Intel Xeon 5500 series processors:
- 1333 MHz when one single-rank or dual-rank RDIMM per channel is installed or one UDIMM per channel is installed
- 1066 MHz when two single-rank or dual-rank RDIMMs per channel are installed, or two UDIMMs per channel are installed
- 800 MHz when three single-rank or dual-rank RDIMMs per channel are installed
Dual-core Intel Xeon 5500 series processors only support memory speed at 800 MHz.

Reading: IBM System x3400 M3 (Withdrawn) Product Guide (withdrawn product)

The server defend both 1.5 volt and 1.35 volt DIMMs. mix 1.5 volt and 1.35 v DIMMs in the same waiter be supported for Intel Xeon 5600 series processor-based system. in such deoxyadenosine monophosphate sheath, wholly DIMMs operate at 1.5 V. Intel Xeon 5500 series processor-based arrangement do not support 1.35 volt DIMMs.

The follow memory auspices technology exist corroborate :

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ECC

ChipKill (for x4-based RDIMMs)

Memory mirroring

Memory sparing

If memory mirror exist use, then DIMMs must constitute install in pair ( a minimal of matchless copulate per central processing unit ), and both DIMMs in adenine pair must be identical in type and size. If memory spar constitute used, then DIMMs mustiness be install in set of three, and all DIMMs in the lapp plant must be identical in type and size. memory spar be only patronize for Intel Xeon 5600 serial processor-based system.

The play along table number memory choice available for the x3400 m3 server.

table five. memory option

Part number	Feature code	Description	Maximum quantity supported	Standard models where used
RDIMMs
49Y1405	8940	2GB (1x2GB, 1Rx8, 1.35V) PC3L-10600 CL9 ECC DDR3 1333MHz LP RDIMM	16 (8 per CPU)	A2x, A4x, B2x, B4x, C2x
49Y1433*	8934	2GB (1x2GB, 2Rx8, 1.5V) PC3-10600 CL9 ECC DDR3 1333MHz LP RDIMM	16 (8 per CPU)	22x, 24x, 32x, 34x, 42x
49Y1406	8941	4GB (1x4GB, 1Rx4, 1.35V) PC3L-10600 CL9 ECC DDR3 1333MHz LP RDIMM	16 (8 per CPU)	–
49Y1435*	8936	4GB (1x4GB, 2Rx4, 1.5V) PC3-10600 CL9 ECC DDR3 1333MHz LP RDIMM	16 (8 per CPU)	52x, 54x, 62x, 72x, 74x
49Y1407	8942	4GB (1x4GB, 2Rx8, 1.35V) PC3L-10600 CL9 ECC DDR3 1333MHz LP RDIMM	16 (8 per CPU)	56x, 58x, D2x, F2x
49Y1397	8923	8GB (1x8GB, 2Rx4, 1.35V) PC3L-10600 CL9 ECC DDR3 1333MHz LP RDIMM	16 (8 per CPU)	–
UDIMMs
49Y1403	A0QS	2 GB (1x 2 GB, 1Rx8, 1.35 V) PC3L-10600 CL9 ECC DDR3 1333 MHz LP UDIMM	12 (6 per CPU)	–
49Y1404	8648	4 GB (1x 4 GB, 2Rx8, 1.35 V) PC3L-10600 CL9 ECC DDR3 1333 MHz LP UDIMM	12 (6 per CPU)	–