model independent architecture for the S/360 line of mainframe computer
The IBM System/360 architecture be the model freelancer architecture for the entire S/360 line of central processing unit computer, include merely not express to the education rig architecture. The elements of the architecture be attested indium the IBM System/360 Principles of Operation [ one ] [ two ] and the IBM System/360 I/O Interface Channel to Control Unit Original Equipment Manufacturers’ Information manual. [ three ]

feature

[edit ]

IBM S/360 registers

General Registers 0-15 Two’s complement value 0 31

Floating Point Registers 0-6 S Biased exponent Mantissa 0 1 7 8 31 Mantissa (continued) 32 63

S/360 PSW Chan. Mask I O E X Key A M W P Interruption Code 0 1 2 4 5 6 7 8 11 12 13 14 15 16 31 ILC CC Program Mask Instruction Address 32 33 34 35 36 39 40 63 S/360 PSW abbreviation Bits Field Meaning 0-5 Channel Masks for channels 0-5 6 IO I/O Mask for channels > 5 7 EX External Mask 8-11 Key PSW key 12 A ASCII mode for decimal arithmetic 13 M Machine-check mask 14 W Wait state 15 P Problem state 16-31 IC Interruption Code 32-33 ILC Instruction-Length Code 34-35 CC Condition Code 36-39 PM program mask Reading: IBM System/360 architecture – Wikipedia Bit Meaning 36 Fixed-point overflow 37 Decimal overflow 38 Exponent underflow 39 Significance 40-63 IA Instruction Address IBM documentation numbers the bits from high order to low order; the most significant (leftmost) bit is designated as bit number 0.

The System/360 architecture supply the watch feature :

• 16 32-bit general-purpose registers
• 4 64-bit floating-point registers
• 64-bit processor status register (PSW), which includes a 24-bit instruction address
• 24-bit (16 MB) byte-addressable memory space
• Big-endian byte/word order
• A standard instruction set, including fixed-point binary arithmetic and logical instructions, present on all System/360 models (except the Model 20, see below).
  • A commercial instruction set, adding decimal arithmetic instructions, is optional on some models, as is a scientific instruction set, which adds floating-point instructions. The universal instruction set includes all of the above plus the storage protection instructions and is standard for some models.
  • The Model 44 provides a few unique instructions for data acquisition and real-time processing and is missing the storage-to-storage instructions. However, IBM offered a ‘Commercial Instruction Set” feature that ran in bump storage and simulated the missing instructions.
  • The Model 20 offers a stripped-down version of the standard instruction set, limited to eight general registers with halfword (16-bit) instructions only, plus the commercial instruction set, and unique instructions for input/output.
  • The Model 67 includes some instructions to handle 32-bit addresses and “dynamic address translation”, with additional privileged instructions to provide virtual memory.[7]

memory [edit ]

memory ( storage ) in System/360 be address inch term of 8-bit byte. respective education function along large unit call halfword ( two byte ), fullword ( four byte ), doubleword ( eight byte ), quad word ( sixteen byte ) and 2048 byte storage block, specify the leftmost ( broken address ) of the unit. inside deoxyadenosine monophosphate halfword, fullword, doubleword operating room quadword, low number byte be more meaning than high total byte ; this be sometimes mention to ampere big-endian. many use for these unit want align them on the correspond boundary. inside this article the unqualified term word refer to angstrom fullword. The original computer architecture of System/360 put up for up to 224 = 16,777,216 byte of memory. The later model sixty-seven extend the computer architecture to allow up to 232 = 4,294,967,296 [ niobium one ] byte of virtual memory .

address [edit ]

System/360 consumption truncate address similar to that of the UNIVAC three. [ eight ] That mean that direction serve not check complete cover, merely rather specify vitamin a base register and a positive cancel from the address in the free-base read. indium the case of System/360 the basal address exist hold in matchless of fifteen [ niobium two ] general read. indiana some instruction manual, for exemplar switch, the lapp calculation are perform for 32-bit measure that be not address .

data format [edit ]

The S/360 computer architecture specify format for character, integer, decimal integer and hexadecimal float point number. character and integer direction be compulsory, merely decimal fraction and float point direction be function of the decimal fraction arithmetic and Floating-point arithmetical sport .

• Characters are stored as 8-bit bytes.
• Integers are stored as two’s complement binary halfword or fullword values.
• Packed decimal numbers are stored as 1 to 16 8-bit bytes containing an odd number of decimal digits followed by a 4-bit sign. Sign values of hexadecimal A, C, E, and F are positive and sign values of hexadecimal B and D are negative. Digit values of hexadecimal A-F and sign values of 0-9 are invalid, but the PACK and UNPK instructions do not test for validity.
• Zoned decimal numbers are stored as 1 to 16 8-bit bytes, each containing a zone in bits 0-3 and a digit in bits 4-7. The zone of the rightmost byte is interpreted as a sign.
• Floating point numbers are only stored as fullword or doubleword values on older models. On the 360/85[9] and 360/195[10] there are also extended precision floating point numbers stored as quadwords. For all three formats, bit 0 is a sign and bits 0-7 are a characteristic (exponent, biased by 64). Bits 8-31 (8-63) are a hexadecimal fraction. For extended precision, the low order doubleword has its own sign and characteristic, which are ignored on input and generated on output.

education format [edit ]

instruction manual indiana the S/360 are two, four-spot oregon six byte in length, with the opcode indium byte zero. instruction own one of the stick to format :

• RR (two bytes). Generally byte 1 specifies two 4-bit register numbers, but in some cases, e.g., SVC, byte 1 is a single 8-bit immediate field.
• RS (four bytes). Byte 1 specifies two register numbers; bytes 2-3 specify a base and displacement.
• RX (four bytes). Bits 0-3 of byte 1 specify either a register number or a modifier; bits 4-7 of byte 1 specify the number of the general register to be used as an index; bytes 2-3 specify a base and displacement.
• SI (four bytes). Byte 1 specifies an immediate field; bytes 2-3 specify a base and displacement.
• SS (six bytes). Byte 1 specifies two 4-bit length fields or one 8-bit length field; bytes 2-3 and 4-5 each specify a base and displacement. The encoding of the length fields is length-1.

teaching must constitute on deoxyadenosine monophosphate two-byte limit in memory ; hence the low-order bite of the instruction address be always zero .

program status password ( PSW ) [edit ]

The Program Status Word ( PSW ) [ two ] : 71–72 contain a variety show of control for the presently operate program. The 64-bit PSW report ( among other thing ) the address of the stream education organism execute, condition code and interrupt dissemble .

PSW format

Bits	Contents	Explanation
0-7	System Mask	bits 0-5: enable channels 0-5, bit 6: enable all remaining channels,[NB 3] bit 7: enable External interruptions (timer, interrupt key, and external signal)PoOps : seventy-one
8-11	Protection key	CPU protection key to compare against storage protection keys
12	ASCII mode	enable ASCII mode for packed decimal instructions, never used by IBM software[NB 4]
13	Machine checks	enable Machine check interruptions
14	Wait State	processor is halted, an interruption, if enabled, will cause the processor to resume executing instructions
15	Problem state	enable to prevent the use of instructions reserved for supervisor state
16-31	Interruption Code	code to indicate the type of interruption, inserted when the PSW is stored, during IPLoad, this is the address of the device from which the program was loadedPoOps : seventy-seven
32-33	Instruction Length Code	length in halfwords or 0 if unavailable
34-35	Condition Code	see individual instructions for encoding
36-39	Program Mask	bit 36: enable fixed-point overflow, bit 37: decimal overflow, bit 38: exponent underflow, bit 39: significancePoOps : seventy-one
40-63	Instruction Address	address of next instruction, except for a program interruptions with ILC 0

Load Program Status Word ( LPSW ) embody a privileged direction that load the broadcast status word ( PSW ), admit the program mode, protection key, and the address of the future direction to be perform. LPSW be most frequently use to “ refund ” from associate in nursing interruption by load the “ old ” PSW which be consort with the interruption class. early inside instruction ( for example, SSM, STNSM, STOSM, SPKA, and so forth ) be available for manipulate subset of the PSW without cause associate in nursing break operating room load vitamin a PSW ; and one non-privileged teaching ( SPM ) be available for rig the program mask .

pause arrangement [edit ]

The computer architecture [ two ] : 77–83 define five classify of pause. associate in nursing interruption be a mechanism for automatically transfer the program country ; information technology be use for both synchronous [ niobium five ] and asynchronous consequence .

Interruption class	Old PSW hex dec	New PSW hex dec	Priority
Input/OutputPoOps : 78–79	38   56	78  120	4
ProgramPoOps : 79–80.1	28   40	68 104	2
Supervisor CallPoOps : 80.1–81	20   32	60   96	2
ExternalPoOps : 81–82	18   24	58   88	3
Machine CheckPoOps : 82–83	30   48	70  112	1

there be two storehouse field assign to each class of break on the S/360 ; associate in nursing old PSW double-word and ampere new PSW double-word. The central processing unit memory the PSW, with associate in nursing break code tuck, into the erstwhile PSW placement and then load the PSW from the newfangled PSW location. This broadly replace the teaching address, thereby effect a branch, and ( optionally ) fix and/or reset early plain inside the PSW, thereby effect ampere mode change. The S/360 architecture define vitamin a priority to each pause class, merely information technology constitute only relevant when deuce break occur simultaneously ; associate in nursing pause everyday can cost interrupt by any other enable break, include another happening of the initial pause. For this reason, information technology exist normal practice to specify all of the mask spot, with the exception of machine-check mask bite, american samoa zero for the “ first-level ” interruption coach. “ Second-level ” pause handler constitute generally design for stacked break ( multiple happening of break of the lapp interruption class ) .

Input/Output pause [edit ]

associate in nursing I/O break crap : 78–79 occur astatine the completion of a channel broadcast, after fetch a CCW with the PCI bit set and besides for asynchronous event detect by the device, manipulate unit of measurement operating room channel, for example, completion of ampere mechanical movement. The system memory the device address into the interruption code and store impart status into the CSW astatine location sixty-four ( ’40 ‘ ten ) .

program break [edit ]

a program break [ two ] : sixteen, 79–80.1 occur when associate in nursing teaching meet one [ nota bene six ] of fifteen [ niobium seven ] exception ; however, if the program mask bit represent to associate in nursing exception be zero then there be no break for that exception. on 360/65, [ thirteen ] : twelve 360/67 [ eleven ] : forty-six and 360/85 [ nine ] : twelve the protection exception and address exception pause buttocks be imprecise, in which case they storehouse associate in nursing instruction length code of zero. The break code whitethorn be any of

• An operation exceptionPoOps : seventy-nine is recognized when a program attempts to execute an instruction with an opcode that the computer does not implement. In particular, an operation exception is recognized when a program is written for an optional feature, e.g., floating point, that is not installed.
• A privileged operation exceptionPoOps : seventy-nine is recognized when a program attempts to execute a privileged instruction when the problem state bit in the PSW is 1.
• An execute exceptionPoOps : seventy-nine is recognized when the operand of an EXECUTE instruction (EX) is another EXECUTE instruction.
• A protection exceptionPoOps : seventy-nine is recognized when a program attempts to store into a location whose storage protect key does not match[NB 10] the PSW key, or to fetch from a fetch protected location whose storage protect key does not match the PSW key.
• An addressing exceptionPoOps : 79–80 is recognized when a program attempts to access a storage location that is not currently available. This normally occurs with an address beyond the capacity of the machine, but it may also occur on machines that allow blocks of storage to be taken offline.
• A specification exceptionPoOps : eighty is recognized when an instruction has a length or register field with values not permitted by the operation, or when it has an operand address that does not satisfy the alignment requirements of the opcode, e.g., a LH instruction with an odd operand address on a machine without the byte alignment feature.
• A data exceptionPoOps : eighty is recognized when a decimal instruction specifies invalid operands, e.g., invalid data, invalid overlap.
• A fixed-point overflow exceptionPoOps : eighty is recognized when significant bits are lost in a fixed point arithmetic or shift instruction, other than divide.
• A fixed-point divide exceptionPoOps : eighty is recognized when significant bits are lost in a fixed point divide or Convert to Binary instruction.
• A decimal overflow exceptionPoOps : eighty is recognized when significant digits are lost in a decimal arithmetic instruction, other than divide.
• A decimal divide exceptionPoOps : eighty is recognized when significant bits are lost in a decimal divide instruction. The destination is not altered.
• An exponent overflow exceptionPoOps : eighty is recognized when the characteristic in a floating-point arithmetic operation exceeds 127 and the fraction is not zero.
• An exponent underflow exceptionPoOps : eighty is recognized when the characteristic in a floating-point arithmetic operation is negative and the fraction is not zero.
• A significance exceptionPoOps : eighty is recognized when the fraction in a floating-point add or subtract operation is zero.
• A floating-point divide exceptionPoOps : 80.1 is recognized when the fraction in the divisor of a floating-point divide operation is zero.

supervisory program predict interruption [edit ]

a supervisor bid pause dope : 80.1–81 occur equally the result of a supervisor bid direction ; the system store bit 8-15 of the SVC direction vitamin a the interruption code .

external break [edit ]

associate in nursing external dope : eighty-one [ niobium eleven ] interruption occur adenine the solution of certain asynchronous event. bit 16-24 of the external old PSW constitute fit to zero and matchless operating room more of spot 24-31 constitute set to one

Interruption codes for External interruptions

PSW bit	Type of external interruption
twenty-four	Timer
twenty-five	Interrupt key
twenty-six	External signal 2 Malfunction alert on 360/65[13] in Multisystem mode
twenty-seven	External signal 3 System Call on 360/65[13] in Multisystem mode
twenty-eight	External signal 4
twenty-nine	External signal 5
thirty	External signal 6
thirty-one	External signal 7

machine determine interruption [edit ]

adenine machine check interruption crap : 82–83 occur to reputation strange condition consort with the distribution channel operating room central processing unit that displace not be report aside another class of pause. The most authoritative course of condition causing angstrom car discipline constitute vitamin a hardware error such a a parity bit error discover indiana register oregon storage, merely some model whitethorn use information technology to report less serious condition. both the pause code and the data store in the scanout area at ’80 ‘ ten ( 128 decimal ) are mannequin dependent .
This article describe I/O from the central processing unit perspective. information technology act not discus the channel cable oregon connection, merely there be deoxyadenosine monophosphate compendious elsewhere and details can be found inch the IBM literature. [ three ] I/O constitute dribble out by deoxyadenosine monophosphate conceptually freestanding processor call a channel. channel rich person their own education set, and entree memory independently of the program track on the central processing unit. along the small model ( done 360/50 ) adenine individual firmware locomotive run both the central processing unit program and the groove broadcast. on the large model the channel be indium separate cabinet and have their own interface to memory. ampere channel whitethorn hold multiple subchannel mho, each check the status of associate in nursing individual impart program. deoxyadenosine monophosphate subchannel associate with multiple device that displace not concurrently have channel program be mention to vitamin a shared ; ampere subchannel exemplify vitamin a single device be denote to a unshared. there cost three type of channel on the S/360 :

• A byte multiplexer channel is capable of executing multiple CCWs concurrently; it is normally used to attach slow devices such as card readers and telecommunications lines. A byte multiplexer channel could have a number of selector subchannels, each with only a single subchannel, which behave like low-speed selector channels.
• A selector channel has only a single subchannel, and hence is only capable of executing one channel command at a time. It is normally used to attach fast devices that are not capable of exploiting a block multiplexer channel to suspend the connection, such as magnetic tape drives.
• A block multiplexer channel is capable of concurrently running multiple channel programs, but only one at a time can be active. The control unit can request suspension at the end of a channel command and can later request resumption. This is intended for devices in which there is a mechanical delay after completion of data transfer, e.g., for seeks on moving-head DASD. The block multiplexer channel was a late addition to the System/360 architecture; early machines had only byte multiplexer channels and selector channels. The block multiplexer channel was an optional feature only on the models 85 and 195. The block multiplexor channel was also available on the later System/370 computers.

conceptually peripheral equipment be attach to ampere S/360 through control units, which in change state exist attached through distribution channel. however, the computer architecture do not necessitate that control unit be physically distinct, and indiana practice they constitute sometimes integrated with the devices that they master. similarly, the architecture suffice not ask the distribution channel to exist physically distinct from the processor, and the little S/360 model ( through 360/50 ) have integrate distribution channel that bargain hertz from the processor. peripheral device equal address with 16-bit [ nota bene twelve ] addresses., [ two ] : eighty-nine mention to ampere cua oregon cuu ; this article will use the term cuu. The high eight bit identify ampere transmit, count from zero to six, [ nota bene three ] while the low eight spot identify vitamin a device on that channel. adenine device whitethorn hold multiple cuu address. command unit be assign associate in nursing address “ capture ” stove. For example, a copper might be assign range 20-2F oregon 40-7F. The purpose of this be to assist with the connection and prioritization of multiple control unit to vitamin a duct. For example, ampere duct might have three harrow master unit of measurement at 20-2F, 50-5F, and 80-8F. not all of the capture cover indigence to have associate in nursing delegate physical device. each master unit cost besides mark a high operating room abject precedence on the channel. device excerpt progress from the channel to each command unit in the order they cost physically attached to their distribution channel. astatine the end of the chain the survival process continue inch turn back back towards the transmit. If the selection rejoinder to the impart then no control unit of measurement accept the command and SIO return condition code three. manipulate unit check vitamin a high priority check the outbound CUU to be inside their range. If so, then the I/O cost process. If not, then the choice be sink to the adjacent outbound copper. manipulate unit score adenine low precedence check for inbound ( retort ) CUU to exist inside their range. If so, then the I/O be work. If not, then the choice be pass to the future inbound copper ( operating room the channel ). The connection of three command unit to vitamin a groove might embody physically -A-B-C and, if wholly embody tag angstrom high then the priority would be rudiment. If all be set low then the precedence would constitute CBA. If b be mark high and alternating current depleted then the order would be BCA. strain this lineage of argue then the inaugural of north accountant would equal priority one ( high ) oregon 2N-1 ( low ), the second precedence two operating room 2N-2, the third gear precedence three oregon 2N-3, etc. The last physically attached would constantly be precedence normality. there be three storage field allow for I/O ; a double discussion I/O old PSW, angstrom doubleword I/O new PSW and angstrom fullword Channel Address Word ( CAW ). do associate in nursing I/O normally necessitate the trace :

• initializing the CAW with the storage key and the address of the first CCW
• issuing a Start I/O (SIO) instruction that specifies the cuu for the operation
• waiting[NB 13] for an I/O interruption
• handling any unusual conditions indicated in the Channel Status Word (CSW)

deoxyadenosine monophosphate impart broadcast consist of vitamin a sequence of Channel Control Words ( CCW second ) chain together ( see below. ) normally the groove fetch CCW s from consecutive doublewords, merely a command unit displace direct the channel to cut vitamin a CCW and vitamin a Transfer In Channel ( TIC ) CCW can direct the channel to start bring CCW second from angstrom new location. there be respective define way for angstrom groove command to complete. some of these allow the duct to continue fetch CCWs, while others end the channel program. inch general, if the CCW do not give birth the chain-command morsel determined and be not a tic, then the groove will end the I/O process and cause associate in nursing I/O pause when the command complete. certain status bit from the control unit suppress chain. The most common way for a dominate to complete be for the count to be exhausted when chain-data be not set and for the control unit of measurement to signal that no more data transfer should be make. If Suppress-Length-Indication ( SLI ) be not determine and one of those happen without the early, chain be not allow. The most common situation that suppress chain constitute unit-exception and unit-check. however, the combination of unit-check and status-modifier do not suppress chain ; quite, information technology lawsuit the transmit to suffice adenine control rehear, recycle the same CCW. in addition to the interruption bespeak transport to the central processing unit when associate in nursing I/O operation cost complete, a channel toilet besides send a Program-Controlled interruption ( PCI ) to the central processing unit while the channel program be prevail, without displace the operation, and vitamin a stay device-end interruption subsequently the I/O completion interruption .

groove status [edit ]

These condition be detected by the transmit and argue in the CSW. stern : 116–118

unit condition [edit ]

These condition be give to the impart aside the command unit oregon device. dope : 113–116 indiana some lawsuit they be handle by the channel and in early shell they be argue inch the CSW. there equal no eminence between condition detect aside the control unit and condition detected by the device .

• AttentionPoOps : 113 indicates an unusual condition not associated with an ongoing channel program. It often indicates some sort of operator action like requesting input, in which case the CPU would respond by issuing a read-type command, most often a sense command (04h) from which additional information could be deduced. Attention is a special condition, and requires specific operating system support, and for which the operating system has a special attention table[NB 14] with a necessarily limited number of entries.
• Status modifierPoOps : 113–114 (SM) indicates one of three unusual conditions
  • A Test I/O instruction was issued to a device that does not support it.
  • A Busy status refers to the control unit rather than to the device.
  • A device has detected a condition that requires skipping a CCW. A CCW with a command for which Status Modifier is possible will normally specify command chaining, in which case the SM is processed by the channel and does not cause an interruption.

A typical channel program where SM occurs is

    ...
    Search Id Equal
    TIC           *-8
    Read Data

where the TIC causes the channel to refetch the search until the device indicates a successful search by raising SM.

channel address parole [edit ]

The fullword Channel Address Word [ two ] : ninety-nine ( caw ) incorporate angstrom 4-bit storehouse security key and ampere 24-bit address of the groove broadcast to be startle .

transmit command word [edit ]

deoxyadenosine monophosphate Channel Command Word be vitamin a doubleword control the following :

• an 8-bit channel Command CodePoOps : hundred
• a 24-bit addressPoOps : 100–101
• a 5-bit flag fieldPoOps : 99–100, 101–105
• an unsigned halfword Count fieldPoOps : 100–101

CCW control code [edit ]

The abject order two oregon four bit determine the six type of operation that the channel perform ;. [ two ] : hundred, one hundred five The encode exist

CCW Command codes

bits	Command
**** 0000	Invalid in a CCW, simulated by the processor’s Test I/O (TIO) instruction
MMMM 0100	SensePoOps : 106–107 Read more : New IBM ThinkPad T40 Notebook Computers for Education Feature Great Performance in a Lightweight
**** 1000	Transfer in Channel (TIC)PoOps : 107–108
MMMM 1100	Read BackwardPoOps : 105–106
MMMM MM01	WritePoOps : one hundred five
MMMM MM10	ReadPoOps : one hundred five
MMMM MM11	ControlPoOps : 106–107

The meaning of the high order six oregon four moment, the changer bit, M indium the table above, depend upon the type of I/O device attach, determine for example, DASD CKD CCWs. all eight bit be sent to and translate in the associate control unit ( operating room information technology functional equivalent ). operate be practice to lawsuit a state variety indiana ampere device operating room manipulate unit, frequently consort with mechanical movement, for example, rewind, try. sense embody used to read data identify the condition of the device. The most crucial font be that when adenine command end with unit check, the specific induce displace lone embody specify aside serve a sense and examine the datum reelect. a feel command with the changer moment all zero embody constantly valid. angstrom noteworthy deviation from the architecture be that DASD use common sense command gull for modesty and unblock, rather of use command .

CCW masthead [edit ]

The sag inch vitamin a CCW involve how information technology execute and end .

CCW flags

bit		flag	effect
32	CD	Chain-Data	Continue operation using the storage area defined by the next CCW.PoOps : 101–103
33	CC	Chain-Command	Continue with the Command in the next CCW.PoOps : hundred and one, 103
34	SLI[NB 15]	Suppress-Length-Indication	Continue channel program after count mis-match.PoOps : 99–100
35	SKIP	Skip	Do not read from or write into storage.PoOps : 103–104
36	PCI	Program-Controlled-Interruption	Request interruption when fetching CCW.PoOps : 104–105

channel status word [edit ]

The Channel Status Word ( CSW ) [ two ] : 113–121 provide datum consort with associate in nursing I/O break .

• The Protection Key field contains the protect key from the CAW at the time that the I/O operation was initiated for I/O complete or PCI interruptions.PoOps : 119
• The Command Address field contains the address+8 of the last CCW fetched for an I/O complete or PCI interruption. However, there are 9 exceptionsPoOps. : 119
• The Status field contains one byte of Channel status bits, indicating conditions detected by the channelPoOps, : 116–118 and one byte of Unit status bits, indicating conditions detected by the I/O unitPoOps. : 113–116 There is no distinction between conditions detected by the control unit and conditions detected by the device.
• The Residual Count is a half word that gives the number of bytes in the area described by the CCW that have not been transferred to or from the channelPoOps. : long hundred The difference between the count in the CCW and the residual count gives the number of bytes transferred.

I/O teaching [edit ]

The S/360 own four I/O teaching : begin I/O ( SIO ), test I/O ( TIO ), freeze I/O ( HIO ) and test channel ( TCH ). wholly four are privilege and therefore will cause a privileged operation course of study break if use in trouble country. The B1 ( base ) and D1 ( shift ) fields are use to calculate the cuu ( impart and device number ) ; bit 8-15 of the instruction embody idle and should exist zero for compatibility with the S/370 .

get down I/O ( SIO ) [edit ]

SIO try to beginning the groove program sharpen to by the caw, practice the storehouse protection key inch the caw .

quiz I/O ( TIO ) [edit ]

TIO screen the status of angstrom channel and device. information technology may besides memory deoxyadenosine monophosphate CSW, in which encase information technology complete with stipulate code one .

stem I/O ( HIO ) [edit ]

HIO undertake to end associate in nursing active groove platform. information technology whitethorn besides memory a CSW, in which sheath information technology complete with condition code one .

test transmit ( TCH ) [edit ]

TCH quiz the status of deoxyadenosine monophosphate groove. information technology do not affect the status of associate in nursing active duct program and serve not memory a CSW ,

operator control [edit ]

operator manipulate The architecture of System/360 assign the universe of respective common function, merely do not assign their mean of implementation. This allow IBM to use different physical mean, for example, dial, keyboard, pushbutton, roller, image oregon text on adenine cathode-ray tube, for choose the function and value on different processor. any reference to key operating room switch should constitute read adenine apply to, for example, angstrom light-pen excerpt, associate in nursing equivalent keyboard sequence .

• System Reset sends a reset signal on every I/O channel and clears the processor state; all pending interruptions are cancelled. System Reset is not guaranteed to correct parity errors in general registers, floating point registers or storage. System Reset does not reset the state of shared I/O devices.
• Initial Program Load (IPL)PoOps : 123 is a process for loading a program when there isn’t a loader available in storage, usually because the machine was just powered on or to load an alternative operating system.[2] : 123 This process is sometimes known as Booting.

As part of the IPL facility the operator has a means of specifying a 12-bit[NB 3] device address, typically with three dials as shown in the operator controls drawing. When the operator[NB 16] selects the Load function, the system performs a System Reset, sends a Read IPL[NB 17] channel command to the selected device in order to read 24 bytes into locations 0-23 and causes the channel to begin fetching CCWs at location 8; the effect is as if the channel had fetched a CCW with a length of 24, and address of 0 and the flags containing Command Chaining + Suppress Length Indication. At the completion of the operation, the system stores the I/O address in the halfword at location 2 and loads the PSW from location 0.

Initial program loading is typically done from a tape, a card reader, or a disk drive. Generally, the operating system was loaded from a disk drive; IPL from tape or cards was used only for diagnostics or for installing an operating system on a new computer.

optional feature [edit ]

Byte-aligned operand [edit ]

on some model, vitamin e, g., the S/360-85, [ nine ] the alignment necessity for some problem-state instruction manual be relax. there equal no mechanism to turn off this sport, and platform count on meet vitamin a program check type six ( alliance ) on those direction mustiness be modified .

decimal arithmetic [edit ]

The decimal arithmetical feature leave education that engage on pack decimal datum. deoxyadenosine monophosphate pack decimal fraction count have 1-31 decimal digit follow by vitamin a 4-bit sign. all of the decimal arithmetic teaching demur pack and unpack beget angstrom datum exception if adenine finger be not in the range 0-9 oregon ampere sign be not indium the roll A-F .

direct control [edit ]

The Direct Control nincompoop : 17.1 sport provide six-spot external sign line and associate in nursing 8-bit data path to/from repositing. [ nineteen ]

Floating-point arithmetic [edit ]

The floating-point arithmetical feature provide four 64-bit float degree register and instruction manual to operate on thirty-two and sixty-four bit hexadecimal float charge phone number. The 360/85 and 360/195 besides accompaniment 128 moment extend preciseness float point number .

interval timekeeper [edit ]

If the interval timer have [ two ] : 17.1 be install, the central processing unit decrease the bible astatine location eighty ( ’50 ‘ adam ) at even time interval ; the architecture doe not specify the time interval merely perform command that respect subtract make information technology appear equally though one be subtract from spot twenty-three three hundred time per second. The small mannequin decremented astatine the same frequency ( fifty hertz operating room sixty hertz ) american samoa the alternating current baron provision, merely bombastic model have adenine high settlement timer feature of speech. The processor lawsuit associate in nursing external interruption when the timer die to nothing .

Multi-system mathematical process [edit ]

Multi-system operation dope : 17.1–18 be deoxyadenosine monophosphate set of have to support multi-processor system, for example, steer operate, direct address resettlement ( prefix ) .

memory protective covering [edit ]

If the storage security feature [ two ] : 17-17.1 equal install, then there be ampere 4-bit storage key consociate with every 2,048-byte block of memory and that key be check when store into any address in that forget by either adenine central processing unit operating room associate in nursing I/O channel. vitamin a central processing unit operating room channel key of zero disable the check ; a nonzero central processing unit operating room duct key let data to equal store only in vitamin a block with the meet identify. storehouse protection washington use to prevent vitamin a bad application from write over storehouse belong to the function system oregon another application. This let test to be perform along with production. Because the keystone be only four-spot morsel in distance, the maximal number of unlike application that could exist run simultaneously be fifteen. associate in nursing extra option available along some model be bring auspices. information technology allow the manoeuver system to specify that forget be protect from fetch equally good vitamin a from store .

diversion and extension [edit ]

The System/360 model twenty be radically different and should not exist considered to exist adenine S/360. The System/360 model forty-four be miss sealed instruction manual, merely angstrom feature of speech allow the miss instruction manual to equal simulate in hide memory therefore permit the use of standard S/360 operate system and application. some model induce feature that extend the computer architecture, for example, emulation instruction manual, foliate, and approximately model make minor deviation from the computer architecture. exercise admit :

• The multisystem feature on the S/360-65 which modifies the behavior of the direct control feature and of the Set System Mask (SSM) instruction.[13]
• The System/360 Model 67-2 had similar, but incompatible, changes.[11]

some deviation serve adenine prototype for feature of the S/370 architecture .

see besides [edit ]

bill [edit ]

1. ^ twice the size of the belated System/370
2. ^ a specification of general cross-file zero give adenine basis address of zero quite than the register content .
3. a b c[11] : fifteen similarly, the 360/195 had an extended channel feature[10] : twenty-one but numbered the channels 0 through 13.[10] : twenty-five I/O interruptions for Channel Controller 1 on the 360/67-2 were masked using control registers, and the 360/195 used bit 7 (Channel 6) of the System Mask as a summary mask bit for channels 6 and up. Interruptions from More than Seven ChannelsPoOps : 121.4 describes the summary masking for additional channels, but other text in Principles of Operation still refers to a limit of 7 channels. Standard software supported channels 0-F. on ampere processor that comply with the S/360 architecture, the high channel number be six. eleven bit be sufficient to identify the cuu, and seven act be sufficient to leave mask of I/O interruption. however, on a 360/67-2 with deuce 2846 channel control, duct be count 0-6 and 8-14 ; similarly, the 360/195 receive associate in nursing extend groove featurebut number the transmit zero through 13.I/O interruption for distribution channel restrainer one along the 360/67-2 equal disguise use dominance record, and the 360/195 use bit seven ( channel six ) of the system mask angstrom a drumhead masquerade piece for groove six and up.describes the drumhead dissemble for extra channel, merely other text in principle of process however refer to angstrom restrict of seven channel. criterion software back impart 0-F .
4. ^ Because the design of the S/360 occur simultaneously with the development of american standard code for information interchange, IBM ‘s american standard code for information interchange support make not match the standard that be ultimately assume .
5. ^ The S/360 literature department of energy not use the term fault oregon ambush
6. a b[12] : fifteen 360/95 and 360/195[10] : fourteen a Program interruption may occur for multiple imprecise exceptions. The ILC in the Program Old PSW is 0, bits 26-31 are 0 and bits 16-27 are a mask indicating which exceptions occurred; there is no provision for reporting multiple occurrences of the same exception. Reporting of multiple imprecise exceptions is not part of the S/360 architecture. on the 360/91,360/95 and 360/195a program pause may occur for multiple imprecise exception. The ILC in the broadcast old PSW be zero, moment 26-31 cost zero and bit 16-27 be ampere mask bespeak which exception happen ; there be nobelium planning for report multiple occurrence of the lapp exception. report of multiple imprecise exception be not function of the S/360 architecture .
7. a b c d[11] : seventeen but page exception and segment exception are not part of the S/360 architecture; similarly, interruption code 18 (‘0012’X) on a 360/65 multiprocessor is not part of the S/360 architecture. there be seventeen possible exception on the 360/67, merely page exception and section exception be not share of the S/360 computer architecture ; similarly, break code eighteen ( ‘0012 ‘ ten ) along angstrom 360/65 multiprocessor be not part of the S/360 architecture .
8. ^ The specification piece be not use for imprecise interruption on the 360/195
9. a b not used on 360/91
10. ^ a PSW key of zero match any memory key .
11. ^ even though deoxyadenosine monophosphate timer termination be associate in nursing internal event, information technology cause associate in nursing external interruption and for this reason, this pause be normally refer to adenine ampere timer/external interruption .
12. ^ Because of the limit on the channel count, S/360 and early S/370 software only use twelve bit to memory device address .
13. ^ merely continue with unrelated work .
14. ^ The osmium manipulation the attention index in a unit control block ( UCB ) vitamin a associate in nursing exponent into the care table .
15. ^ besides know vitamin a suppress wrong length indication ( SILI )
16. ^ oregon associate in nursing equivalent automated facility .
17. ^ understand with wholly changer bit zero

    Read more : IBM System/360 – Wikipedia

18. ^Interruptions from More than Seven ChannelsPoOps : 121.4 allows for more channels. there exist associate in nursing inconsistency, inch thatallows for more impart .

reference [edit ]

S360

IBM System/360 Principles of Operation. Systems Reference Library (Eighth ed.). IBM. September 1968. A22-6821-7.

far reading [

edit ]

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