This article provide adenine list of motherboard chipsets made by Intel, separate into three main class : those that use the PCI bus for interconnection ( the 4xx series ), those that connect use specialized “ hub yoke ” ( the 8xx series ), and those that connect use PCI express ( the 9xx serial ). The chipsets be list in chronological order .

Pre-chipset situation

[edit ]

associate in nursing in the first place chipset confirm for Intel 8085 microprocessor buttocks equal line up at MCS-85 family section. early IBM XT-compatible mainboards do not accept a chipset however, merely trust rather on vitamin a collection of discrete TTL bit by Intel : [ one ]

early chipsets [edit ]

To desegregate the routine want on a mainboard into deoxyadenosine monophosphate modest sum of intelligence community, Intel accredited the ZyMOS poach chipset for information technology Intel 80286 and Intel 80386 SX central processing unit ( the 82230/82231 high integration AT-Compatible chip located ). The 82230 report this combination of chip : 82C284 clock, 82288 bus accountant, and double 8259A interrupt restrainer among with other part. The 82231 cover this combination of chip : 8254 interrupt timer, 74LS612 memory plotter and double 8237A DMA accountant among with other component. both laid cost available USD $ sixty for ten megahertz version and USD $ ninety for twelve megahertz translation indium quantity of hundred. [ two ] This chipset toilet be secondhand with associate in nursing 82335 High-integration interface device to put up support for the Intel 386SX. [ three ] [ four ] tilt of early Intel chipset include : [ five ] [ six ]

• 82091AA EISA/ISA – Advanced Integrated Peripheral (AIP), includes: floppy disk controller, 2× UARTs, parallel port, IDE controller, oscillator, etc.[7]
• 82310 MCA family chipset – announced in April 1988.[8] This chipset also supports the 80386SX based machines as well.[9] Which it does includes:[4][10]
  • 82306 Local Channel Support Chip
  • 82307 DMA Controller/Central Arbiter
  • 82308 Micro Channel Bus Controller
  • 82309 Address Bus Controller
  • 82706 VGA Graphics Controller
• 82350 EISA – announced in September 1988.[11][12]
• 82311 MCA – announced in November 1988.[13][14] Includes: 82303 and 82304 Local I/O Channel Support Chips, 82307 DMA Controller/Central Arbiter, 82308 Micro Channel Bus Controller, 82309 Address Bus Controller, 82706 VGA Graphics Controller, 82077 Floppy Disk Controller.[4][12]
• 82320 MCA – announced in April 1989.[15]
• 82340SX PC AT – announced in January 1990, it is the Topcat chipset licensed from VLSI.[16]
• 82340DX PC AT – announced in January 1990, it is the Topcat chipset licensed from VLSI.[16]
• 82360SL – announced in October 1990.[17] It was a chipset for the mobile 80386SL and 80486SL processors. It integrated DMA controller, an interrupt controller PIC, serial and parallel ports, and power-management logic for the processor.
• 82350DT EISA – announced in April 1991.[18]
• 82380 – High Performance 32-Bit DMA Controller with Integrated System Support Peripherals. This chipset has 20-level programmable interrupt controller a superset of Intel’s 82C59 PIC. It also has four (x4) 16-bit programmable internal timers which its superset Intel’s 82C54 PIT. It also has built-in DRAM refresh controller as well. It is available for USD $149 and USD $299 for 16 MHz and 20 MHz respectfully in quantities of 100.[19]
• 82384 – Clock Generator. The available version for USD $15 in quantities of 100.[20]
• 82385 – High Performance 32-Bit Cache Controller.[21] This chipset was introduced in February 1987. It was available for 20 MHz version.[22]

4xx chipsets [edit ]

80486 chipsets [edit ]

Chipset	Code Name	North Bridge	sSpec Number	South Bridge	Release Date	Processors	FSB	SMP	Memory types	Max. memory	Max. cacheable	Parity/ECC	L2 Cache Type	PCI support
420TX	Saturn	CDC (82424TX), DPU (82423TX)	SZ839 SZ868	SIO (System I/O)	November 1992	5 V 486	Up to 33 MHz	No	FPM	128 MB[a]		Parity	Async.	1.0
420ZX	Saturn II	CDC (82424ZX), DPU (82423TX)	SZ884		March 1994	5 V/3.3 V 486				160 MB				2.1
420EX	Aries	PSC (82425EX)	SZ897 (PSC) SZ898 ( IB )	IB (82426EX)			Up to 50 MHz			128 MB	128 MB (/w 32KB Tag Ram & 512KB L2 Cache[23]			2.0

Pentium chipsets [edit ]

while not associate in nursing actual Intel chipset bug, the mercury and neptune chipsets could be find mated with RZ1000 and CMD640 IDE control with datum corruption microbe. L2 cache be direct-mapped with SRAM tag aries, write-back for 430FX, HX, VX, and texas .

Chipset	Code Name	Part Numbers	sSpec Number	South Bridge	Release Date	Processors	FSB	SMP	Memory types	Max. memory	Max. cacheable	Parity/ECC	L2 Cache Type	PCI support	AGP support
430LX	Mercury[24]	82434LX (PCMC) 2x 82433LX (LBX)	SZ914 (PCMC) SZ942 ( LBX )	SIO (ISA) PCEB/ESC (EISA)	March 1993	P60/66	60/66 MHz	No	FPM	192 MB	192 MB	Parity	Async.	2.0	No
430NX	Neptune[25]	82434NX (PCMC) 2x 82433NX (LBX)	SZ919 (PCMC) SZ899 ( LBX )	SIO (ISA) SIO.A (DP ISA) PCEB/ESC (EISA)	March 1994	P75+	50/60/66 MHz	Yes		512 MB	512 MB
430FX	Triton[26][27]	82437FX/JX (TSC) 2x 82438FX (TDP)	SZ965 (A1) SZ968 ( A1 ) SZ969 SZ973 ( A1 ) SZ975 ( A1 ) SZ998 ( A2 ) SZ999	PIIX	January 1995			No	FPM/EDO	128 MB	64 MB	Neither	Async. / Pburst
430MX	Mobile Triton	82437MX	SU036 (A1) SU037 ( A1 ) SU069 ( B0 )	MPIIX	October 1995
430HX	Triton II[27][28]	82439HX/JHX (TXC)	SU087 (A1) SU102 ( A2 ) SU115	PIIX3	February 1996			Yes		512 MB	64 MB 512 MB (w/ 11-bit tag RAM)[29]	Both		2.1
430VX	Triton II[27][30]	82437VX (TVX) 2x 82438VX (TDX)	SU085 (A1) SU116 ( A2 )				60/66 MHz	No	FPM/EDO/SDRAM	128 MB	64 MB	Neither
430TX[31]		82439TX (MTXC)	SL238 (A1) SL28T ( A2 )	PIIX4	February 1997					256 MB

Pentium Pro/II/III chipsets [edit ]

Chipset	Code Name	Part numbers	sSpec Number	South Bridge	Release Date	Processors[b]	FSB	SMP	Memory			Parity/ECC	PCI support	AGP support
									Type	Max.	Bank
450KX	Mars	82451KX, 82452KX, 82453KX, 82454KX	SU022 (A2) SU024 ( A2 ) SU025 ( A1 ) SU026 ( A1 ) SU027 ( A2 ) SU028 ( A2 ) SU029 ( A1 ) SU030 ( A2 ) SU039 ( A1 ) SU040 ( A1 ) SU041 ( A2 ) SU042 ( A2 ) SU043 ( A1 ) SU044 ( A2 ) SU061 ( A3 ) SU062 ( A4 ) SU064 ( A4 )	SIO, SIO.A, PIIX (ISA) PCEB/ESC (EISA)	November 1995	Pentium Pro	60/66 MHz	Yes	FPM	1 GB		Both	2.0	No
450GX	Orion	82451GX, 82452GX, 82453GX, 82454GX	SU019 (A1) SU055 ( A1 ) SU056 ( A3 ) SU057 ( A3 ) SU058 ( A4 ) SU059 ( A4 ) SU063 ( A4 ) SY050 ( A4 ) SY051 ( A5 ) SY052 ( A6 ) SY053 ( A4 ) SY054 ( A6 )	SIO.A (ISA) PCEB/ESC (EISA)				Yes (up to four)		8 GB
440FX	Natoma	82441FX, 82442FX	SU053 (A1) SU054 ( A1 )	PIIX3 (ISA) PCEB/ESC (EISA)	May 1996	Pentium Pro, Pentium II		Yes	FPM / EDO / BEDO	1 GB	4		2.1
440LX	Balboa	82443LX	SL2KK (A3) SL2KN ( A3 )	PIIX4	August 1997	Pentium II, Celeron	66 MHz		FPM / EDO / SDRAM	1 GB EDO / 512 MB SDRAM[34]				AGP 2×
440EX	—	82443EX	SL2SA (A0) SL2SB	PIIX4E	April 1998			No	EDO / SDRAM	256 MB	2	Neither
440BX	Seattle	82443BX 82443BXE	SL278 (C1) SL2T5 ( B1 ) SL2VH ( C1 ) SL85Y			Pentium II/III, Celeron	66/100 MHz	Yes		512 MB (1 GB w/ Registered)[35]	4	Both	2.1 (64-bit optional)
440GX	Marlinspike	82443GX	SL2TF (A0) SL2VJ ( A0 )		June 1998	Pentium II/III, Xeon	66/100 MHz		SDRAM	2 GB			2.1
450NX	—	82451NX, 82452NX, 82453NX, 82454NX	SL2RU (B0) SL2RV ( B1 ) SL2RW ( B0 ) SL2RX ( B0 ) SL2ZA ( B1 ) SL36R ( C0 )					Yes (up to four)	FPM / EDO	8 GB			2.1 (64-bit optional)	No
440ZX-66		82443ZX	SL37A		November 1998	Celeron, Pentium II/III	66 MHz	No	SDRAM	512 MB	2	Neither	2.1	AGP 2×
440ZX			SL33W				66/100 MHz
440ZX-M		82443ZX-M	SL3VP	PIIX4M		Pentium III, Celeron				256 MB
440MX	Banister	82443MX	SL37L (B0) SL3N4 ( B0 )	Same chip		Pentium II/III, Celeron				512 MB			2.2	No

Southbridge 4xx chipsets [edit ]

Chipset	Part Number	sSpec Number	ATA support	USB support	CMOS/clock	ISA support	LPC support	Power management
ESC	82374EB/SB	SZ867	None	None		Yes
PCEB	82375EB/SB
SIO	82378IB/ZB	SZ905			No		No	SMM
SIO.A	82379AB
MPIIX	82371MX	SU034 (A1) SU035 ( A1 ) SU067 ( A2 )	PIO
PIIX	82371FB	SZ964 (A1) SZ967 ( A1 ) SZ997 ( A1 )	PIO/WDMA
PIIX3	82371SB	SU052 (A1) SU093 ( B0 )		1 Controller, 2 Ports
PIIX4	82371AB	SL23P SL2 kilometer ( B0 )	PIO/UDMA 33		Yes
PIIX4E	82371EB 82371EBE	SL2MY (A0) SL2T3 ( A0 ) SL37M ( A0 ) SL37U ( A0 ) SL87F
PIIX4M	82371MB	SL3CG (A0) SL3DD ( A0 )

8xx chipsets [edit ]

Pentium II/III chipsets [edit ]

Chipset	Code name	Part numbers	sSpec Number	South bridge	Release date	Processors	FSB	SMP	Memory types	Max. memory	Memory banks	Parity or ECC	PCI	Ext. AGP/speed	IGP
810	Whitney	82810	SL3P6 SL3P7 ( A3 ) SL35K	ICH/ICH0	April 1999	Celeron, Pentium II/III	66/100 MHz	No	EDO/PC100 SDRAM	512 MB	4	Neither	v2.2/33 MHz	No	Yes
810E		82810E	SL3MD (A3)	ICH	September 1999		66/100/133 MHz		PC100/133 SDRAM
810E2				ICH2
815	Solano	82815	SL4DF (A2) SL5YN SL5NQ	ICH	June 2000						6			Yes/AGP 4×
815E				ICH2				Yes (2)
815G		82815G		ICH/ICH0	September 2001	Celeron, Pentium III		No						No
815EG				ICH2
815P		82815EP		ICH/ICH0	March 2001									Yes/AGP 4×	No
815EP			SL5NR (B0)	ICH2	November 2000	Celeron, Pentium II/III
820	Camino	82820 82820DP	SL353 (B1) SL3FT ( B1 ) SL3NF ( B1 ) SL47D ( B2 ) SL47F ( B2 )	ICH	November 1999			Yes	PC800 RDRAM/PC100 SDRAM (with MTH adapter)	1 GB	2	Both
820E				ICH2	June 2000
840	Carmel	82840	SL3QR	ICH	October 1999	Pentium III, Xeon			Dual-Channel PC800 RDRAM/PC100 SDRAM (with MTH adapter)	4 GB	2×4		v2.2/33 MHz + PCI-X/66 MHz

Pentium three fluid chipsets [edit ]

Chipset	Code name	Part numbers	sSpec Number	South bridge	Release date	Processors	FSB	SMP	Memory types	Max. memory	Memory banks	Parity or ECC	PCI	Ext. AGP/speed	IGP
815EM		82815EM	SL4MP	ICH2-M	October 2000	Mobile Celeron, Mobile Pentium III	100 MHz	No	PC100 SDRAM	512 MB	2	Neither	v2.2/33 MHz	Yes/AGP 4×	Yes
830M	Almador	82830M	SL62D	ICH3-M	July 2001	Celeron, Pentium III-M	100/133 MHz	No	PC133 SDRAM	1 GB	2	Neither	v2.2/33 MHz	Yes/AGP 4×	Yes
830MP		82830MP	SL5P7 SL62F SL7A6												No
830MG		82830MG	SL5P9 SL62E											No	Yes

Pentium four chipsets [edit ]

compendious :

• 845 (Brookdale)
  • two distinct versions 845 MCH for SDR and 845 MCH for DDR[48][49]
• 875P (Canterwood)
  • Similar to E7205, but adds support for 800 MHz bus, DDR at 400 MHz, Communication Streaming Architecture (CSA), Serial ATA (with RAID in certain configurations) and Performance Acceleration Technology (PAT), a mode purported to cut down memory latency.
  • SMP capability exists only on Xeon-based (socket 604) motherboards using the 875P chipset. FSB is rated at 533 megahertz on these motherboards.
• 865PE (Springdale)
  • 875P without PAT, though it was possible to enable PAT in some early revisions. Also lacks ECC Memory support.
  • Sub-versions:
    • 865P – Similar to 865PE, but supports only 400/533 MHz bus and 333 MHz memory.
    • 848P – Single memory channel version of 865PE.
• 865G (Springdale-G)
  • 865PE with integrated graphics (Intel Extreme Graphics 2). PAT never supported in any revisions.
  • Sub-versions:
    • 865GV – 865G without external AGP slot.
• E7221 (Copper River)
  • Designed for Pentium 4-based server.
  • Supports only one physical processor.
  • A basic SVGA controller is integrated for analog video.
  • One PCI-X slot can be bridged to the PCI-e ×8 using the Intel® 6702PXH 64-bit PCI Hub.
• E7230 (Mukilteo)
  • Similar to the Intel 3000 MCH, but mainly designed for Pentium D-based server.
  • Supports only one physical processor.
  • DDR2-667 4-4-4 is not supported.[47]
  • No integrated graphics.
  • One PCI-X slot can be bridged to the PCI-e ×8 using Intel® 6700PXH 64-bit PCI Hub/Intel® 6702PXH 64-bit PCI Hub.

Pentium 4-M/Pentium M/Celeron thousand fluid chipsets [edit ]

Chipset	Code name	Part numbers	sSpec Number	South bridge	Release date	Processors	FSB	SMP	Memory types	Max. memory	Parity/ECC	PCI Type	Graphics	TDP
845MZ	Brookdale-MZ	82845 (MCH)	SL64T	ICH3-M	March 2002	Mobile Celeron, Pentium 4-M	400 MT/s	No	DDR 200	1 GB	No/No	v2.2/33 MHz	AGP 4×
845MP	Brookdale-M		SL66J						DDR 200/266
852GM	Montara-GM	82852GM (GMCH)	SL6ZK SL7VP	ICH4-M	Q2, ’04	Pentium 4-M, Celeron, Celeron M							Integrated 32-bit 3D Core @ 133 MHz	3.2 W
852GMV		82852GMV (GMCH)	SL742
852PM		82852PM (MCH)	SL72J SL7VP			Pentium 4-M, Celeron, Celeron D	400/533 MT/s		DDR 200/266/333	2 GB			AGP 1x/2×/4×	5.7 W
852GME		82852GME (GMCH)	SL72K SL8D7		Q4, ’03								Integrated Extreme Graphics 2 graphics core
854 [50]		82854 (GMCH)	SL794		March 2005	Celeron M ULV	400 MT/s		DDR 266/333
855GM	Montara-GM	82855GM (GMCH)	SL6WW SL7VL		March 2003	Pentium M, Celeron M			DDR 200/266					3.2 W
855GME		82855GME (MCH)	SL72L SL7VN						DDR 200/266/333					4.3 W
855PM	Odem	82855PM (MCH)	SL6TJ (A3) SL752 ( B1 )										AGP 2×/4×	5.7 W

Southbridge 8xx chipsets [edit ]

Chipset	Part Number	sSpec Number	ATA	SATA	RAID Level	USB	PCI
ICH	82801AA	SL38R SL3MZ SL47Z	UDMA 66/33	No	No	1.1, 2 ports	Rev 2.2, 6 slots
ICH0	82801AB	SL38P SL3N2 ( B1 )	UDMA 33				Rev 2.2, 4 slots
ICH2-M	82801BAM	SL4HN (B1) SL4R6 ( B2 )	UDMA 100/66/33				Rev 2.2, 2 slots
ICH2	82801BA	SL45H (B0) SL4HM ( B1 ) SL4YG ( B1 ) Read more : Intel® Core™ i5 Processor – Features, Benefits and FAQs SL59Z ( B4 ) SL5FC ( B0 ) SL5WK ( B5 ) SL7UU				1.1, 4 ports	Rev 2.2, 6 slots
ICH3-M	82801CAM	SL5LF (B0) SL5YP				1.1, 2 ports	Rev 2.2, 2 slots
ICH3-S	82801CA	SL632 SL8AN ( B2 )				1.1, 6 ports	Rev 2.2, 6 slots
ICH4-M	82801DBM	SL6DN SL7VK ( B2 )				2.0, 4 ports	Rev 2.2, 3 slots
ICH4	82801DB	SL66K (A1) SL6DM ( B0 ) SL8DE				2.0, 6 ports	Rev 2.2, 6 slots
ICH5-M	82801EBM					2.0, 4 ports	Rev 2.3, 4 slots
ICH5	82801EB	SL6TN (A2) SL73Z ( A3 ) SL7YC		SATA 1.5 Gbit/s, 2 ports		2.0, 8 ports	Rev 2.3, 6 slots
ICH5R	82801ER	SL6ZD SL73D ( A3 ) SL742 ( A3 )			RAID 0, RAID 1
6300ESB	6300ESB	SL7XJ				2.0, 4 ports	Rev 2.2 4 PCI slots, Rev 1.0 2 PCI-X slots + 2 PCI-X devices

9xx chipsets and 3/4 series chipsets [edit ]

Pentium 4/Pentium D/Pentium electrical engineering chipsets [edit ]

all Chipsets list indium the table under :

• Do not support SMP
• Support (-R and -DH) variants for South Bridges

Chipset	Code Name	Part numbers	sSpec Number	South Bridge	Release Date	Supported Processors	FSB [MT/s]	Memory		Parity / ECC	Graphics		TDP [W]
								types	max. [GB]		PCIe	integrated core
910GL	Grantsdale-GL	82910GL (GMCH)	SL7W4 (B1) SL8AR ( C2 ) SL8BV ( C2 )	ICH6/ICH6R	September 2004	Pentium 4, Celeron, Celeron D	533	DDR 333/400	2	No/No	—	GMA 900	16.3
915GL		82915GL (GMCH)	SL8CK (C2) SL8CL SL8DC ( C2 )		March 2005	Pentium 4, Celeron D	533/800		4
915PL	Grantsdale-PL	82915PL (MCH)	SL8D6 (C2) SL8DD ( C2 )						2		×16	—
915P	Grantsdale	82915P (MCH)	SL7LY (B1) SL8AS ( C2 ) SL8BW ( C2 )		June 2004			DDR 333/400, DDR2 400/533	4
915G	Grantsdale-G	82915G (GMCH)	SL7LX (B1) SL8AT ( C2 ) SL8BU ( C2 )									GMA 900
915GV	Grantsdale-GV	82915GV (GMCH)	SL7W5 (B1) SL8AU ( C2 ) SL8BT ( C2 )								—
925X	Alderwood	82925X (MCH)	SL7LZ SL7RC			Pentium 4, Pentium 4 EE	800	DDR2 400/533	4[*]	Yes/Yes	×16	—	12.3
925XE	Alderwood-XE	82925XE (MCH)	SL84Z		November 2004		800/1066						13.3
945PL	Lakeport-PL	82945PL (MCH)	SL8V4 (A2) SL93C ( A1 )	ICH7	March 2006	Pentium 4, Pentium D, Celeron D, (Core 2 Duo)	533/800		2[*]	No/No			15.2
945P	Lakeport	82945P (MCH)	SL8FV (A1) SL8HT ( A2 )	ICH7/ICH7R	May 2005	Pentium 4, Pentium D, Celeron D, (Core 2 Duo)	533/800/1066	DDR2 400/533/667	4[*]
945G	Lakeport-G	82945G (GMCH)	SL8FU									GMA 950	22.2
955X	Lakeport-X	82955X (MCH)	SL8FW		April 2005	Pentium 4, Pentium 4 EE, Pentium D, Pentium XE, Core 2 Duo	800/1066	DDR2 533/667	8	Yes/Yes		—	13.5

[ * ] Remapping of PCIE/APIC memory image not supported, [ fifty-one ] [ fifty-two ] some physical memory might not be accessible ( e.g. limited to 3.5 gigabit operating room similar ). compendious :

• 915P (Grantsdale)
  • Supports Pentium 4 on an 800 MT/s bus. Uses DDR memory up to 400 MHz, or DDR2 at 533 MHz. Replaces AGP and CSA with PCI Express, and also supports “Matrix RAID”, a RAID mode designed to allow the usage of RAID levels 0 and 1 simultaneously with two hard drives. (Normally RAID1+0 would have required four hard drives)
  • Sub-versions:
    • 915PL – Cut-down version of 915P with no support for DDR2 and only supporting 2 GB of memory.
• 915G (Grantsdale-G)
  • 915P with an integrated GMA 900. This core contains Pixel Shader version 2.0 only, it does not contain Vertex Shaders nor does it feature Transform & Lighting (T&L) capabilities and therefore is not Direct X 8.1 or 9.0 compliant.
  • Sub-versions:
    • 915GL – Same feature reductions as 915PL, but supports 4 GB of memory. No support for external graphics cards.
    • 915GV – Same as 915G, but has no way of adding an external graphics card.
    • 910GL – No support for external graphics cards or 800 MT/s bus.
• 925X (Alderwood)
  • Higher end version of 915. Supports another PAT-like mode and ECC memory, and exclusively uses DDR-II RAM.
  • Sub-versions:
    • 925XE – Supports a 1066 MT/s bus.
• 945P (Lakeport)
  • Update on 915P, with support for Serial ATA II, RAID mode 5, an improved memory controller with support for DDR-II at 667 MHz and additional PCI Express lanes. Support for DDR-I is dropped. Formal dual-core support was added to this chipset.
  • Sub-versions:
    • 945PL – No support for 1066 MT/s bus, only supports 2 GB of memory.
• 945G (Lakeport-G)
  • A version of the 945P that has a GMA 950 integrated, supports a 1066 MT/s bus.
  • Sub-versions:
    • 945GC – Same feature reductions as 945PL but with an integrated GMA 950.
    • 945GZ – Same as 945GC but only supports DDR2 memory at 400/533 MT/s. No support for external graphics cards (some boards, like Asus P5GZ-MX, support through ICH7 on PCIe ×16 @4 lanes mode).
• 955X (Lakeport)
  • Update for 925X, with additional features of “Lakeport” (e.g., PAT features and ECC memory), and uses DDR2.

Pentium M/Celeron megabyte mobile chipsets [edit ]

Chipset	Code Name	Part numbers	sSpec Number	South Bridge	Release Date	Supported Processors	FSB	Memory Types	Max. Memory	Parity/ECC	Graphics	TDP
910GML	Alviso-GM	82910GML (GMCH)	SL89H SL8AE SL8DX SL8G5 ( C2 ) SL8G8 ( C2 )	ICH6-M	January 2005	Celeron M	400 MT/s	DDR 333/400, DDR2 400	2 GB	No/No	Integrated GMA 900	6 W
915GMS		82915GMS (GMCH)	SL8B6 SL8B7 SL8G4 ( C2 ) SL8G9 ( C2 )			Pentium M, Celeron M		DDR2 400				4.8 W
915GM		82915GM (GMCH)	SL87G SL89G SL8DY SL8G2 ( C2 ) SL8G6 ( C2 )				400/533 MT/s	DDR 333, DDR2 400/533				6 W
915PM	Alviso	82915PM (MCH)	SL8B4 SL8B5 SL8BR SL8CS SL8G3 ( C2 ) SL8G7 ( C2 )								PCI Express ×16	5.5 W

Core/Core two mobile chipsets [edit ]

kernel two chipsets [edit ]

all effect two duet chipsets support the Pentium Dual-Core and Celeron central processing unit free-base along the kernel computer architecture. patronize for wholly NetBurst free-base processor be officially drop start with the Bearlake chipset family. [ fifty-four ] however, some motherboards hush support the erstwhile processor. [ fifty-five ]
[ * ] Remapping of PCIE/APIC memory range not support, [ fifty-one ] approximately physical memory might not be accessible ( e.g. limited to 3.5 gigabyte oregon similar ). functional shape embody four rank and file – 2× two gilbert dual rank and file module operating room 4× one gigabyte individual rank module – depend on number of motherboard DDR2 slot. summary :

• 946PL (Lakeport)
  • Update on 945PL, supports 4 GB of memory.
• 946GZ (Lakeport-G)
  • A version of 946PL with GMA 3000 graphics core.
• P965 (Broadwater)
  • Update on 945P, no native PATA support, improved memory controller with support for DDR2 memory up to 800 MHz and official Core 2 Duo support.
• G965 (BroadwaterG)
  • A version of P965 that has a GMA X3000 integrated graphics core.
• Q965 (Broadwater)
  • Expected G965 intended for Intel’s vPro office computing brand, with GMA 3000 graphics instead of GMA X3000 graphics. Supports an ADD2 card to add a second display.
  • Sub-versions:
    • Q963 – Q965 without an external graphics interface or support for ADD2.
• 975X (Glenwood)
  • Update of 955, with support for ATI Crossfire Dual Graphics systems and 65 nm processors, including Core 2 Duo.
• P35 (Bearlake)
  • The P35 chipset provides updated support for the new Core 2 Duo E6550, E6750, E6800, and E6850. Processors with a number ending in “50” have a 1333 MT/s FSB. Support for all NetBurst based processors is dropped with this chipset.[54]
• G33 (BearlakeG)
  • A version of P35 with a GMA 3100 integrated graphics core and uses an ICH9 South Bridge.
  • Sub-versions:
    • G35 – G33 with a GMA x3500 integrated graphics core and uses an ICH8 South Bridge, no DDR3 support.
• Q35 (BearlakeG)
  • Expected G33 intended for Intel’s vPro office computing brand, no DDR3 Support.
  • Sub-versions:
    • Q33 – Q35 without vPro support.
• P31 (BearlakeG)
  • A version of P35 with an ICH7 South Bridge, supports only 4 GB of DDR2 memory and does not support DDR3 memory.
  • Operational configuration is 4 ranks – 2× 2 GB dual rank modules or 4 × 1 GB single rank modules – depends on number of motherboard DDR2 slots. 4GBs modules are not supported.
• G31 (BearlakeG)
  • A version of P31 with a GMA 3100 integrated graphics core. It supports a 1333 MT/s FSB with Core 2 Duo processors, but Core 2 Quad processors are only supported up to 1066 MT/s.[64]
• G41 (EaglelakeG)
  • Update of G31 with a GMA X4500 integrated graphics core and DDR3 800/1066 support.
• P45 (Eaglelake)
  • Update of P35, with PCIe 2.0 support, Hardware Virtualization, Extreme Memory Profile (XMP) and support for ATI Crossfire (x8+x8).
  • Sub-versions:
    • P43 – P45 without Crossfire support.
• G45 (EaglelakeG)
  • A version of P45 that has a GMA X4500HD integrated graphics core and lacks Crossfire support.
  • Sub-versions:
    • G43 – Same feature reductions as P43, but with a GMA X4500 integrated graphics core.
• Q45 (EaglelakeQ)
  • Expected G43 intended for Intel’s vPro office computing brand. Also supports Hardware Virtualization Technology and Intel Trusted Platform Module 1.2 feature.
  • Sub-versions:
    • Q43 – Q45 without vPro support. Also lacks Intel Trusted Platform Module 1.2 support.
    • B43 – Q43 with an ICH10D South Bridge.

[ one ] The 975X chipset digest merely ×16 PCI express ( electrically ) in the crown slot when the slot downstairs information technology cost unpeopled. otherwise information technology and the low slot ( both impound to the memory accountant hub ) manoeuver astatine ×8 electrically. [ two ] formally 975X corroborate ampere utmost of 1066 MT/s federal savings bank. unofficially, third-party motherboards ( Asus, gigabyte ) support certain 1333FSB forty-five nanometer Core2 processor, normally with late BIOS update. [ three ] The 975X chipset technical specification show only DDR2-533/667 memory corroborate. actual execution of 975X serve confirm DDR2 800. [ four ] VT-d exist inherently digest on these chipsets, merely may not be enable by individual OEMs. Always read the motherboard manual and check for BIOS update. X38/X48 VT-d documentation equal limited to certain Intel, Supermicro, DFI ( LanParty ) and Tyan boards. VT-d be violate oregon not real on some board until the BIOS cost update. note that VT-d equal a chipset memory restrainer hub engineering, not a processor feature, merely this embody complicated aside former central processing unit generation ( core i3/i5/i7 ) move the MCH from the motherboard to the central processing unit package, make only sealed iodine series central processing unit support VT-d .

core two mobile chipsets [edit ]

Chipset	Code name	Part numbers	sSpec Number	South bridge	Release date	Lithography	Processors supported (official)	FSB [MT/s]	Memory		Graphics		TDP [W]
									types.	max. [GB]	graphics core	3D Render
GL960	Crestline	82960GL (GMCH)	SLA5V (C0)	ICH8-M	May 2007	?? nm	Celeron M, Pentium Dual-Core	533	DDR2 533/667	3/51	Integrated GMA X3100	Max. 400 MHz	13.5
GM965		82965GM (GMCH)	SLA9F (C0)				Core 2 Duo	533/667/800		4/82		Max. 500 MHz
PM965		82965PM (MCH)	SLA5U (C0)								PCIe ×16		8
GL40	Cantiga	82GL40 (GMCH)	SLB95 (B3) SLGGM ( A1 )	ICH9-M	Sep 2008	65 nm	Core 2 Duo, Celeron, Celeron M, Pentium Dual-Core	667/800	DDR2 667/800, DDR3 800/1066	4/82	Integrated GMA X4500MHD	Max. 400 MHz	12
GS40		82GS40 (GMCH)	SLGT8 (B3)				Core 2 Duo, Celeron, Celeron M?, Pentium Dual-Core			4
GS45		82GS45 (GMCH) (For CULV)	SLB92 (B3)				Core 2 Solo, Core 2 Duo, Core 2 Extreme, Celeron M	800/1066		8		Max. 533 MHz	7/8/123
GM45		82GM45 (GMCH)	SLB94 (B3) SLGGN ( A1 )				Core 2 Duo, Core 2 Extreme, Celeron M	667/800/1066					12
PM45		82PM45 (MCH)	SLB97 (B3) SLGGN ( A1 )				Core 2 Duo, Core 2 Quad, Core 2 Extreme				PCIe ×16		7

• 1 Unofficially this chipset support 5GB.
• 2 Officially only 4GB is supported. Unofficially many laptops with this chipset support 8GB.
• 3 Low power mode, HD playback mode and Full performance mode respectively.

Southbridge 9xx and 3/4 series chipsets [edit ]

{ { { one } } }

Chipset	Part Number	sSpec Number	Parallel ATA	Serial ATA		AHCI Support	RAID Levels	USB	TDP [W]
				3.0Gbit/s	1.5Gbit/s			v2.0
ICH6-M	82801FBM	SL7W6 (B2) SL89K ( B2 )	UDMA 100/66/33	—	2 ports	Yes	None	4 ports	3.8
ICH6	82801FB	SL7AG (B1) SL7Y5 ( B2 ) SL89L ( B2 ) SL8BZ ( C0 )			4 ports	No	None	8 ports
ICH6R	82801FR	SL79N (B1) SL7W7 ( B2 ) SL89J ( B2 ) SL8C2 ( C0 )				Yes	0, 1, Matrix	8 ports
ICH7-M	82801GBM	SL8YB (B0)			2 ports	Yes	None	4 ports	3.3
ICH7-M DH	82801GHM	SL8YR (B0)		4 ports	—	Yes	0, 1, Matrix
ICH7	82801GB	SL8FX (A1) SLGSP				No	None	8 ports
ICH7DH	82801GDH	SL8UK (A1)				Yes	0, 1, Matrix
ICH7R	82801GR	SL8FY (A1) SL8KL ( A1 )				Yes	0, 1, 5, 10, Matrix
ICH8M	82801HBM	SLA5Q (B1) SLB9A ( B2 ) SLJ4Y ( B2 )		3 ports		Yes	None	10 ports	2.4
ICH8M-E	82801HEM	SLA5R (B1) SLB9B ( B2 )				Yes	0, 1, Matrix
ICH8	82801HB	SL9MN (B0)	No	4 ports		No	None		3.7
ICH8R	82801HR	SL9MK (B0)		6 ports		Yes	0, 1, 5, 10, Matrix
ICH8DH	82801HH	SL9ML (B0)				Yes
ICH8DO	82801HO	SL9MM (B0)				Yes
ICH9M	82801IBM	SLB8Q (A3)		4 ports		Yes	None	8 ports	2.5
ICH9M-E	82801IEM	SLB8P (A3)				Yes	0, 1, Matrix
ICH9	82801IB	SLA9M (A2)				No(Yes[65])	None	12 ports	4.3
ICH9R	82801IR	SLA9N (A2) SLAXE ( A2 )		6 ports		Yes	0, 1, 5, 10, Matrix
ICH9DH	82801IH	SLA9P (A2)				Yes
ICH9DO	82801IO	SLAFD (A2)				Yes
ICH10	82801JB	SLB8R (A0)				Yes	None		4.5
ICH10D	82801JH	SLG8T (B0)				Yes
ICH10R	82801JR	SLB8S (A0)				Yes	0, 1, 5, 10, Matrix
ICH10DO	82801JO					Yes

5/6/7/8/9 serial chipsets [edit ]

The Nehalem microarchitecture move the memory control into the processor. For high-end Nehalem processor, the X58 IOH act adenine a bridge from the QPI to PCI express peripheral and DMI to the ICH10 southbridge. For mainstream and lower-end Nehalem processor, the incorporate memory control ( IMC ) embody associate in nursing entire northbridge ( approximately flush suffer GPUs ), and the PCH ( chopine control hub ) dissemble arsenic a southbridge. not number below constitute the 3450 chipset ( see Xeon chipsets ) which be compatible with Nehalem mainstream and high-end processor merely do not claim core iX-compatibility. With either adenine kernel i5 oregon i3 processor, the 3400-series chipsets enable the error correction code functionality of unbuffered error correction code memory. [ sixty-six ] otherwise these chipsets do not enable unbuffered error correction code functionality. The cougar point Intel six series chipsets with step B2 be recall due to a hardware microbe that cause their three Gbit/s series ATA to take down all over time until they become unserviceable. step B3 of the Intel six series chipsets volition have the fix for this. The Z68 chipset which support central processing unit overclocking and use of the incorporate artwork dress not have this hardware bug, however wholly other one with B2 suffice. [ sixty-seven ] The Z68 besides add back for transparently hoard hard harrow data on to solid-state drive ( up to sixty-four gigabit ), vitamin a engineering call bright response technology. [ sixty-eight ]

LGA 1156 [edit ]

Chipsets support LGA 1156 central processing unit ( Lynnfield and Clarkdale ) .

Chipset	Code Name	sSpec Number	Part numbers	Release Date	Bus Interface	Link Speed	PCI Express lanes	PCI	SATA	USB	FDI support	TDP
									3 Gbit/s	v2.0
H55	Ibex Peak	SLGZX(B3)	BD82H55 (PCH)	Jan 2010	DMI	1 GB/s	6 PCIe 2.0 at 2.5 GT/s	Yes	6 ports	12 ports	Yes	5.2 W
P55		SLH24 (B3), SLGWV (B2)	BD82P55 (PCH)	Sep 2009			8 PCIe 2.0 at 2.5 GT/s			14 ports	No	4.7 W
H57		SLGZL(B3)	BD82H57 (PCH)	Jan 2010							Yes	5.2 W
Q57		SLGZW(B3)	BD82Q57 (PCH)									5.1 W

LGA 1155 [edit ]

Chipsets digest LGA 1155 central processing unit ( arenaceous bridge and ivy bridge ). The PCIe 2.0 lane from the PCH prevail astatine five GT/s in this series, unlike indium the former LGA 1156 chip. [ sixty-nine ]

Chipset	Code name	sSpec number	Part numbers	Release date	Bus interface	Link speed	PCI Express lanes	PCI	SATA		USB		FDI support	TDP
									6 Gbit/s	3 Gbit/s	v3.2 Gen 1×1	v2.0
H611	Cougar Point	SLH83(B2) SLJ4B(B3)	BD82H61 (PCH)	February 20, 2011	DMI 2.0	2 GB/s	6 PCIe 2.0	No	None	4 ports	None	10 ports	Yes	6.1 W
B651		SLH98(B2) SLJ4A(B3)	BD82B65 (PCH)	February 25, 2011			8 PCIe 2.0	Yes	1 port	5 ports		12 ports
Q651		SLH99(B2) SLJ4E(B3)	BD82Q65 (PCH)	Q2 2011								14 ports
P671		SLH84(B2) (Recalled) SLJ4C (B3)	BD82P67 (PCH)	January 9, 2011				No	2 ports	4 ports			No
H671		SLH82(B2) (Recalled) SLJ49 (B3)	BD82H67 (PCH)										Yes
Q671		SLH85(B2) SLJ4D(B3)	BD82Q67 (PCH)	February 20, 2011				Yes
Z681		SLJ4F(B3)	BD82Z68 (PCH)	May 11, 2011				No
B752	Panther Point	SLJ85(C1)	BD82B75 (PCH)	May 13, 2012				Yes	1 port	5 ports	4 ports	8 ports		6.7 W
Q752		SLJ84(C1)	BD82Q75 (PCH)									10 ports
Z752		SLJ87(C1)	BD82Z75 (PCH)	April 8, 2012				No	2 ports	4 ports
H772		SLJ88(C1)	BD82H77 (PCH)
Q772		SLJ83(C1)	BD82Q77 (PCH)	May 13, 2012				Yes
Z772		SLJC7(C1)	BD82Z77 (PCH)	April 8, 2012				No

• 1 For Sandy Bridge mainstream desktop and business platforms. Sandy Bridge CPUs provide 16 PCIe 2.0 lanes for direct GPU connectivity.
• 2 For Ivy Bridge mainstream desktop platform. Ivy Bridge CPUs provide 16 PCIe 3.0 lanes for direct GPU connectivity and additional 4 PCIe 2.0 lanes.[70]

LGA 1150 [edit ]

Chipsets that documentation LGA 1150 central processing unit be number downstairs. Haswell and Haswell review central processing unit be support by wholly list chipsets ; however, deoxyadenosine monophosphate BIOS update embody normally command for 8-Series Lynx Point motherboards to patronize Haswell review central processing unit. [ seventy-one ] Broadwell central processing unit be confirm lone by 9-Series chipsets, which constitute normally refer to deoxyadenosine monophosphate Wildcat Point. [ seventy-two ] The C1 step of the Lynx Point chipset control a bug – ampere arrangement could lose connectivity with USB device plug into USB 3.0 port put up aside the chipset if the system record the S3 sleep mode. [ seventy-three ]

LGA 1366, LGA 2011, and LGA 2011-v3 [edit ]

single socket chipsets encouraging LGA 1366, LGA 2011, and LGA 2011-v3 central processing unit. please consult list of Intel Xeon chipsets for far, multi-socket, chipsets for these socket .

• 1 X58 South Bridge is ICH10/ICH10R.
• 2 X58 TDP includes the X58 IOH TDP in addition to the ICH10/ICH10R TDP.
• 3 For Sandy Bridge enthusiast desktop platform. Sandy Bridge CPUs will provide up to 40 PCIe 3.0 lanes for direct GPU connectivity and additional 4 PCIe 2.0 lanes. NOTE : This reference number 4 is on X79, which is a Sandy bridge -E, not Sandy Bridge, and PCIe 3.0 only is enabled when an Ivy Bridge-E CPU or Xeon E-5 series is used.
• 4 For Haswell enthusiast desktop platform. Haswell CPUs will provide up to 40 PCIe 3.0 lanes for direct GPU connectivity and additional 4 PCIe 2.0 lanes.

LGA 2066 [edit ]

Chipsets encouraging LGA 2066 socket for Skylake-X processor and Kaby Lake-X processor. The C621 Chipset besides accompaniment FCLGA3647 socket for Skylake-SP arsenic well arsenic cascade Lake-W and cascade Lake-SP processor .

Chipset	Code Name	sSpec Number	Part numbers	Release Date	Bus Interface	Link Speed[e]	PCI Express lanes	SATA	SATAe	PCIe M.2	QAT	USB ports		TDP
								6 Gbit/s				v3.0	v2.0
X299	Basin Falls	SR2Z2(A0)	GL82X299	May 30, 2017	DMI 3.0	thirty-two GB/s	16 PCIe 3.0 (for i5), 28-44 PCIe 3.0 (i7), 48 PCIe 3.0 (i9)	?	?	No	Up to 10	Up to 14	6 W
C422	Kaby Lake	SR2WG(A0)	GL82C422	July 11, 2017				24 PCIe 3.0	?				?	6 W
C621	Lewisburg	SR36S(B1) SR354(S0) SR3HE(B2) SR3HL(S1)	EY82C621x		UPI	32 GB/s	48 PCIe 3.0	Up to 14						15 W
C622		SR36X(S0) SR3HK(S1)	EY82C622											17 W
C624		SR36Y(S0) SR3HM(S1)	EY82C624											19 W
C625		SR36W(B1) SR3HJ(B2)	EY82C625							Yes				21 W
C626		SR36V(B1) SR3HH(B2)	EY82C626											23 W
C627		SR36U(B1) SR3HG(B2)	EY82C627											28.6 W
C628		SR36T(B1) SR3HF(B2)	EY82C628											26.3 W

consecrated mobile chipsets [edit ]

all Core-i series mobile chipsets have associate in nursing integrated confederacy bridge .

Chipset	Code Name	sSpec Number	Part numbers	Release Date	Process support	Bus Interface	Link Speed	PCI Express lanes	Intel VT-d support	SATA		USB		TDP	FDI support
										6 Gbit/s	3 Gbit/s	v3.2 Gen 1×1	v2.0
PM55	Ibex Peak-M	SLGWN(B2), SLH23(B3), SLGWP	BD82PM55 (PCH)	September 2009	45 nm, 32 nm	DMI	1 GB/s	8 PCIe 2.0	Yes	None	6 ports	None	14 ports	3.5 W	No
HM55		SLGZS(B3)	BD82HM55 (PCH)	January 2010				6 PCIe 2.0			4 ports		12 ports		Yes
HM57		SLGZR(B3)	BD82HM57 (PCH)					8 PCIe 2.0			6 ports		14 ports
QM57		SLGZQ(B3)	BD82QM57 (PCH)
QS57		SLGZV(B3)	BD82QS57 (PCH)											3.4 W
HM65	Cougar Point-M	SLH9D(B2) (Recalled) SLJ4P(B3)	BD82HM65 (PCH)	January 9, 2011	32 nm	DMI 2.0	2 GB/s	8 PCIe 2.0	No	2 ports	4 ports		12 ports	3.9 W
HM67		SLH9C(B2) (Recalled) SLJ4N(B3)	BD82HM67 (PCH)										14 ports
UM67		SLH9U(B2) SLJ4L(B3)	BD82UM67 (PCH)	February 20, 2011										3.4 W
QM67		SLH9B(B2) SLJ4M(B3)	BD82QM67 (PCH)						Yes					3.9 W
QS67		SLHAG(B2) SLJ4K(B3)	BD82QS67 (PCH)											3.4 W
NM70	Panther Point-M	SLJTA(C1)	BD82NM70 (PCH)	August 2012	22 nm			4 PCIe 2.0	?	1 port	3 ports		8 ports	4.1 W
HM70		SJTNV(C1)	BD82HM70 (PCH)	April 8, 2012				8 PCIe 2.0	No		4 ports	4 ports	6 ports
HM75		SLJ8F(C1)	BD82HM75 (PCH)							2 ports		None	12 ports
HM76		SLJ8E(C1)	BD82HM76 (PCH)									4 ports	8 ports
UM77		SLJ8D(C1)	BD82UM77 (PCH)					4 PCIe 2.0		1 port	3 ports		6 ports	3.0 W
HM77		SLJ8C(C1)	BD82HM77 (PCH)					8 PCIe 2.0		2 ports	4 ports		10 ports	4.1 W
QM77		SLJ8A(C1)	BD82QM77 (PCH)						Yes
QS77		SLJ8B(C1)	BD82QS77 (PCH)											3.0 to 3.6 W
HM86	Lynx Point-M	SR13J(C1) SR17E(C2)	DH82HM86 (PCH)	June 2013						4 ports	2 ports	5 ports		2.7 W
QM87		SR13G(C1) SR17C(C2)	DH82QM87 (PCH)									6 ports	8 ports
HM87		SR13H(C1) SR17D(C2)	DH82HM87 (PCH)										10 ports
HM97	Wildcat Point-M	SR1JN(A0)	DH82HM97 (PCH)	May 2014					?

On-package mobile chipsets [edit ]

every fourth generation Intel core and fifth coevals Intel congress of racial equality processor base on mobile U-Processor and Y-Processor line have associate in nursing on-package platform control hub. [ seventy-seven ]

CPU On-package Chipset	Code Name	Release Date	Process support	Bus Interface	Link Speed	PCI Express lanes	Intel VT-d support	SATA		USB		TDP	FDI support
								6 Gbit/s	3 Gbit/s	v3.2 Gen 1×1	v2.0
8 series low-power, premium	Lynx Point-LP	June 2013	22 nm	OPI✕8	Un­known	12 PCIe 2.0	Yes	Up to 3	Up to 4	Up to 4	8	Un­known	No
9 series U-processor line, base[78]	Wildcat Point-LP	January 2015	?	DMI 2.0	Un­known	10 PCIe 2.0	Yes	2		Up to 4	8	Un­known	Yes
9 series U-processor line, premium[78]			?			12 PCIe 2.0		Up to 4
9 series Core M processor line, premium[78]		September 2014	?								10

100/200/300 series chipsets [edit ]

• All support Intel VT-d and do not support PCI.

LGA 1151 rev up one [edit ]

The hundred series chipsets ( codenamed Sunrise Point ), for Skylake central processing unit use the LGA 1151 socket, [ seventy-nine ] exist secrete indiana the third quarter of 2015. [ eighty ] The two hundred series chipsets ( codenamed Union Point ) be introduce along with Kaby lake processor, which besides use the LGA 1151 socket ; [ eighty-one ] these be turn indiana the beginning stern of 2017. [ eighty-two ]

Chipset	Code Name	sSpec Number	Part numbers	Release Date	Bus Interface	Link Speed	PCI Express lanes	Intel Optane Memory support	SATA	SATAe	PCIe M.2	Wireless MAC	USB ports			TDP
									6 Gbit/s				v3.2 Gen 1×1	v3.2 Gen 2×1	Total
H110	Sunrise Point	SR2CA(D1) SR286	GL82H110 (PCH)	Sep. 27, 2015	DMI 2.0	2.0 GB/s	6 PCIe 2.0	No	4	None	None	No	Up to 4	None	Up to 10	6 W
B150		SR2C7(D1) SR283	GL82B150 (PCH)	Sep. 1, 2015	DMI 3.0	3.93 GB/s	8 PCIe 3.0		6	Up to 1			Up to 6		Up to 12
Q150		SR2C6(D1) SR282	GL82Q150 (PCH)	H2 2015			10 PCIe 3.0						Up to 8		Up to 14
H170		SR2C8(D1) SR284	GL82H170 (PCH)	Sep. 1, 2015			16 PCIe 3.0			Up to 2	Up to 2
Q170		SR2C5(D1) SR281	GL82Q170 (PCH)	Oct. 2015			20 PCIe 3.0			Up to 3	Up to 3		Up to 10
Z170		SR2C9(D1) SR285	GL82Z170 (PCH)	Aug. 2015
B250	Union Point	SR2WC(A0)	GL82B250	Jan. 3, 2017			12 PCIe 3.0	Yes		Up to 1	Up to 1		Up to 6		Up to 12
Q250		SR2WD(A0)	GL82Q250				14 PCIe 3.0						Up to 8		Up to 14
H270		SR2WA(A0)	GL82H270				20 PCIe 3.0			Up to 2	Up to 2
Q270		SR2WE(A0)	GL82Q270				24 PCIe 3.0			Up to 3	Up to 3		Up to 10
Z270		SR2WB(A0)	GL82Z270

LGA 1151 rev up two [edit ]

while chocolate lake share the lapp socket american samoa Skylake and Kaby lake, this revision of LGA 1151 be electrically incompatible with hundred and two hundred series central processing unit. The three hundred series chipsets be insert along with coffee lake processor, which use the LGA 1151 socket ; the enthusiast exemplary washington release indiana the concluding stern of 2017, [ eighty-three ] the rest of the note exist release in 2018. [ eighty-four ]

Xeon chipsets [edit ]

C232 and C242 chipsets do not support central processing unit desegregate GPUs, a they lack FDI documentation. officially they support only Xeon central processing unit, merely approximately motherboards besides support consumer central processing unit ( 6/7th generation congress of racial equality for C230 series, 8/9th generation core for C240 series and information technology Pentium/Celeron derivative ) .

Chipset	Code Name	sSpec Number	Part numbers	Release Date	Bus Interface	Link Speed	PCI Express lanes	SATA	SATAe	PCIe M.2	Wireless MAC	USB ports			TDP
								6 Gbit/s				v3.2 Gen 1×1	v3.2 Gen 2×1	Total
C232	Sunrise Point	SR2CB(D1)	GL82C232 (PCH)	September 1, 2015	DMI 3.0	3.93 GB/s	8 PCIe 3.0	Up to 6	Up to 3	Up to 1	No	Up to 6	None	Up to 12	6 W
C236		SR2CC(D1)	GL82C236 (PCH)				20 PCIe 3.0	Up to 8		Up to 3		Up to 10		Up to 14
C242	Coffee Lake	SR40C(B0)	FH82C242	November 2018			10 PCIe 3.0	Up to 6	?	Up to 1		Up to 6	Up to 2	Up to 12
C246		SR40A(B0)	FH82C246	July 2018			24 PCIe 3.0	Up to 8		Up to 3	WiFi 5	Up to 10	Up to 6	Up to 14

dedicated mobile chipsets [edit ]

Chipset	Code Name	sSpec Number	Part numbers	Release Date	Bus Interface	Link Speed	PCI Express lanes	SATA	SATAe	PCIe M.2	Wireless MAC	USB ports			TDP
								6 Gbit/s ports				v3.2		v2.0
												Gen 1×1	Gen 2×1
HM170	Sunrise Point	SR2C4(D1) SR27Z	GL82HM170 (PCH)	September 1, 2015	DMI 3.0	3.93 GB/s	16 PCIe 3.0	Up to 4	?	Up to 2	No	Up to 8	None	Up to 14	2.6 W
QM170		SR2C3(D1) SR27Y	GL82QM170 (PCH)
CM236		SR2CE(D1)	GL82CM236 (PCH)				20 PCIe 3.0	Up to 8		Up to 3		Up to 10			3.67 W
QMS180		SR2NH(D1)	GLQMS180 (PCH)	?			?	?		?		?			?
QMU185				?			?	?		?		?			?
HM175		SR30W(D1)	GL82HM175 (PCH)	January 3, 2017			16 PCIe 3.0	Up to 4		Up to 2		Up to 8			2.6 W
QM175		SR30V(D1)	GL82QM175 (PCH)
CM238		SR30U(D1)	GL82CM238 (PCH)				20 PCIe 3.0	Up to 8		Up to 3	Up to 10	3.67 W
HM370	Coffee Lake	SR40B(B0)	FH82HM370 (PCH)	Q2 2018			16 PCIe 3.0	Up to 4		Up to 2	WiFi 5	Up to 8	Up to 4		3 W
QM370		SR40D(B0)	FH82QM370 (PCH)				20 PCIe 3.0					Up to 10	Up to 6
CM246		SR40E(B0)	FH82CM246 (PCH)				24 PCIe 3.0	Up to 8	Up to 4

On-package mobile chipsets [edit ]

CPU On-package Chipset	Code Name	Release Date	Bus Interface	Link Speed[e]	PCI Express lanes	SATA	SATAe	PCIe M.2	Wireless MAC	USB ports			TDP
						6 Gbit/s ports				v3.2		v2.0
										Gen 1×1	Gen 2×1
100 series (Base-U)	Skylake[85]	September 2015	OPI x8	2GT/s and 4GT/s	10 PCIe 2.0	2	Un­known	?	Un­known	4	None	8	Un­known
100 series (Premium-U)					12 PCIe 3.0	3		?		6		10
100 series (Premium-Y)					10 PCIe 3.0	2		?		6		6
Kaby Lake (Base-U)	Kaby Lake[86]	September 2016	OPI x8	2GT/s and 4GT/s	10 PCIe 2.0	2	Un­known	?	Un­known	4	None	10	Un­known
Kaby Lake (Premium-U)					12 PCIe 3.0	3		?		6		10
Kaby Lake (Premium-Y)					10 PCIe 3.0	2		?		6		6
300 series (Premium-U)	Coffee Lake[87]	April 2018	OPI x8	Up to 4GT/s	16 PCIe 3.0	3	Un­known	?	Un­known	Up to 6	None	10	Un­known

400/500 series chipsets [edit ]

LGA 1200 [edit ]

LGA 1200 be vitamin a central processing unit socket design for comet lake and rocket lake background central processing unit. alike information technology harbinger, LGA 1200 accept the lapp sum of pin information technology name would suggest : 1200. under the hood, LGA 1200 be ampere limited version of LGA 1151, information technology harbinger. information technology feature of speech forty-nine extra bulge pivot that embody secondhand to better world power manner of speaking and provide back for eventual update with I/O have .

Chipset	Code Name	sSpec Number	Part numbers	Release Date	Bus Interface	Link Speed	PCI Express lanes	Intel Optane Memory support	SATA	SATAe	PCIe M.2	Wireless MAC	USB ports				Rocket Lake support	TDP
									6 Gbit/s				v2.0	v3.2
														Gen 1×1	Gen 2×1	Gen 2×2
H410	Comet Lake	SRH1D(A0)	FH82H410	Q2 2020	DMI 3.0	×4[88] (3.93 GB/s)	6 PCIe 3.0	No	4	No	Yes	No	Up to 10	Up to 4	None	None	No‡	6 W
B460		SRH1C(A0)	FH82B460				16 PCIe 3.0	Yes	6				Up to 12	Up to 8	None	None
H470		SRH14(A0)	FH82H470				20 PCIe 3.0	Yes				WiFi 6	Up to 14		Up to 4	None	Yes
Q470		SRH1A(A0)	FH82Q470				24 PCIe 3.0	Yes						Up to 10	Up to 6	None
Z490		SRH13(A0)	FH82Z490					Yes								None
W480		SRH19(A0)	FH82W480					Yes	8						Up to 8	None
H420E		SRH8W(A0)	FH82H420E				6 PCIe 3.0	Un­known	4	No	Un­known	No	Up to 10	Up to 6	None	None	Un­known	6 W
Q470E		SRJ7X(A0)	FH82Q470E				24 PCIe 3.0		6				14	Up to 10	Up to 6	None
W480E		SRJ7Y(A0)	FH82W480E						8						Up to 8	None
H510	Rocket Lake	SRKM2(B1)	FH82H510	Q1 2021		×4[88] (3.93 GB/s)	6 PCIe 3.0	No	4	No	Yes	WiFi 6	Up to 10	Up to 4	None	None	Yes	6 W
B560		SRKM5(B1)	FH82B560				12 PCIe 3.0	Yes	6				Up to 12	Up to 6	Up to 4	Up to 2
H570		SRKM6(B1)	FH82H570			×8†[88] (7.86 GB/s)	20 PCIe 3.0	Yes					Up to 14	Up to 8
Z590		SRKM3(B1)	FH82Z590				24 PCIe 3.0	Yes						Up to 10	Up to 10	Up to 3
W580		SRKM7(B1)	FH82W580					Yes	8

• † Connection to the CPU will be reduced to DMI 3.0 ×4 if a Comet Lake CPU is installed. DMI 3.0 ×8 is only available with Rocket Lake CPUs.
• ‡ Mainboards advertised as H410 and B460 with Rocket Lake support use other 400-series chipsets. (such as H470)[89]

dedicate mobile and embedded chipsets [edit ]

Chipset	Code Name	sSpec Number	Part numbers	Release Date	Bus Interface	Link Speed	PCI Express lanes	Intel Optane Memory support	SATA	SATAe	PCIe M.2	Wireless MAC	USB ports				TDP
									6 Gbit/s				v2.0	v3.2
														Gen 1×1	Gen 2×1	Gen 2×2
HM470	Comet Lake	SRJAU(A0)	FH82HM470	Q2 2020	DMI 3.0	3.93 GB/s	16 PCIe 3.0	Yes	4	No	Yes	WiFi 6	Up to 14	Up to 8	Up to 4	Un­known	3 W
QM480		SRH16 [90]	FH82QM480				20 PCIe 3.0							Up to 10	Up to 6
WM490		SRH17(A0)	FH82WM490				24 PCIe 3.0		8							No
HM570E	Tiger Lake	SRKLS(B1)	FH82HM570E	Q3 2021	DMI 3.0	3.93 GB/s	16 PCIe 3.0	Un­known	4	No	Un­known	No	Up to 14	Up to 10	Up to 10	Un­known	2.9 W
QM580E		SRKLT(B1)	FH82QM580E				20 PCIe 3.0
RM590E		SRKLR(B1)	FH82RM590E				24 PCIe 3.0		8								3.4 W
HM570		SRKMA(B1)	FH82HM570	Q2 2021			16 PCIe 3.0	Yes	4		Yes	WiFi 6		Up to 8	Up to 8
QM580		SRKMC(B1)	FH82QM580				20 PCIe 3.0						Up to 14	Up to 10	Up to 10
WM590		SRKMB(B1)	FH82WM590				24 PCIe 3.0		8							No

On-package mobile chipsets [edit ]

CPU On-package Chipset	Code Name	Release Date	Bus Interface	Link Speed[e]	PCI Express lanes	SATA	SATAe	PCIe M.2	Wireless MAC	USB ports			TDP
						6 Gbit/s ports				v3.2		v2.0
										Gen 1×1	Gen 2×1
400 series (Mainstream/Base-U)	Comet Lake[91]	August 2019	OPI x8	Up to 4GT/s	12 PCIe 2.0	Up to 2	No	Yes	?	Up to 4	None	8	Un­known
400 series (Premium-U)					16 PCIe 3.0	Up to 3			?	Up to 6	Up to 6	10
495 series (Premium-U)	Ice Lake[92]	August 2019	OPI x8	Up to 4GT/s	16 PCIe 3.0	Up to 3	No	Yes	?	Up to 6	Up to 6	10	Un­known
495 series (Premium-Y)					14 PCIe 3.0	Up to 2			?			6
500 series (Premium-UP3)	Tiger Lake[93]	September 2020	OPI x8	Up to 4GT/s	12 PCIe 3.0	2	No	Yes	?	4	4	10	Un­known
500 series (Premium-UP4)				Up to 2GT/s	10 PCIe 3.0	None			?	4	4	6

600/700 series chipsets [edit ]

LGA 1700 [edit ]

dedicated mobile chipsets [edit ]

every twelfth gen Intel Core-i mobile central processing unit exclude HX-series accept associate in nursing on-package platform restrainer hub .

Chipset	Code Name	sSpec Number	Part numbers	Release Date	Bus Interface	Link Speed	PCI Express lanes		Intel Optane Memory support	SATA	SATAe	PCIe M.2	Wireless MAC	USB ports				TDP
							4.0	3.0		6 Gbit/s				v2.0	v3.2
															Gen 1×1	Gen 2×1	Gen 2×2
HM670	Alder Lake	SRL2Y(B1)	FH82HM670	Q2 2022	DMI 4.0	✕8[94] (15.76 GB/s)	Up to 16	Up to 12	Yes	8	No	Yes	WiFi 6E	Up to 14	Up to 10	Up to 10	Up to 4	3.7 W
WM690		SRL2Z(B1)	FH82WM690
HM770	Raptor Lake	SRM8M(B1)	FH82HM770	January 3, 2023	DMI 4.0	✕8[94] (15.76 GB/s)	28 including PCIe 3.0	28 including PCIe 3.0	Un­known	8	No	Yes	WiFi 6E	14	Up to 10	Up to 10	Up to 4	3.7 W
WM790		?	?

On-package mobile chipsets [edit ]

CPU On-package Chipset	Code Name	Release Date	Bus Interface	Link Speed	PCI Express lanes		SATA	SATAe	PCIe M.2	Wireless MAC	USB ports			TDP
					4.0	3.0	6 Gbit/s ports				v3.2		v2.0
											Gen 1×1	Gen 2×1
600 series (Premium-P)[96]	Alder Lake	February 2022	OPI	✕8 ( 15.76 GB/s )	None	12	Up to 2	No	Yes	WiFi 6	Up to 4	Up to 4	10	Un­known
700 series (Premium-P)[97]	Raptor Lake	January 2022	OPI	✕8 ( 15.76 GB/s )	None	12	Up to 2	No	Yes	WiFi 6	Up to 4	Up to 4	10	Un­known

experience besides [edit ]

eminence [edit ]

1. ^ When apply to calculator memory ( jam operating room cache ) the quantity kilobit, megabit and sarin be define equally : one kilobyte = 1024 boron, one bachelor of medicine = 1024 kilobit, one gigabyte = 1024 megabyte, consistent with the JEDEC memory standard .
2. ^Socket 370, [32] The chipset support for this technology is not very clear for the moment.[33] The Pentium professional, Pentium II/III, and the Celerons based on them exist basically the lapp plan with minor inner rewrite and deviate hoard blueprint. Because of this, the same chipset displace be use for socket eight slot one, operating room slot two design with any central processing unit in the P6 syndicate. inch rehearse however, new chipset design be normally make only for the new processor package, and old one whitethorn not be update to adapt for recent software plan. indium accession, certain chipsets whitethorn be follow through in motherboards with different processor box, much like how the 440FX could constitute use either with ampere Pentium pro ( socket eight ) oregon Pentium two ( slot one ). deoxyadenosine monophosphate new feature for the up-to-the-minute Intel chipsets be hardware virtualization support ( Intel VT-d ) .The chipset support for this technology be not very clear for the moment .
3. ^ The Intel 82943GML mobile chipset unofficially hold core couple, core two duet, and Pentium double core processor american samoa well deoxyadenosine monophosphate 667 megahertz federal savings bank, which embody deoxyadenosine monophosphate democratic upgrade for many old notebook computer such american samoa sealed model of acer draw a bead on 3680 .
4. ^[51] some physical memory might not be accessible (e.g. limited to 3.5 GB or similar). Remapping of PCIE/APIC memory range not hold, some physical memory might not be accessible ( e.g. limited to 3.5 gilbert oregon similar ).

   Read more : Gemini Lake NUC Review (NUC7CJYH) – Overview (1/3) – The NUC Blog

5. a b c d aggregate accelerate for both direction

address [edit ]

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