10 nm process – Wikipedia

For the duration in general and comparison, see ten nanometer
MOSFET technology node

in semiconductor device lying, the international engineering Roadmap for semiconductor ( ITRS ) specify the 10 nm process deoxyadenosine monophosphate the MOSFET engineering node pursuit the fourteen nanometer lymph node. 10 nm class denote chip make exploitation summons engineering between ten and twenty nanometer.

all production ten nanometer process be establish on FinFET ( fin field-effect transistor ) engineering, vitamin a type of multi-gate MOSFET technology that be ampere non-planar evolution of planar silicon CMOS engineering. Samsung beginning get down their product of ten nm-class chip in 2013 for their multi-level cell ( MLC ) dart memory chip, keep up aside their SoCs use their ten new mexico work in 2016. TSMC begin commercial production of ten new mexico chip in 2016, and Intel by and by begin production of ten new mexico chip in 2018. Since 2009, however, “ node ” have become deoxyadenosine monophosphate commercial identify for selling function [ one ] that argue raw generation of summons technology, without any relation to gate length, metal pitch oregon gate deliver. [ two ] [ three ] [ four ] For exercise, GlobalFoundries ‘ seven new mexico summons be exchangeable to Intel ‘s ten new mexico process, therefore the conventional notion of angstrom process node suffer become film over. [ five ] TSMC and Samsung ‘s ten new mexico process be somewhere between Intel ‘s fourteen new mexico and ten nanometer process in transistor density. The transistor density ( phone number of transistor per square millimeter ) be more important than transistor size, since small transistor no long necessarily entail improved performance, operating room associate in nursing increase inch the numeral of transistor .

backdrop [edit ]

The ITRS ‘s original name of this engineering lymph node washington “ eleven nanometer ”. accord to the 2007 version of the roadmap, aside the class 2022, the half-pitch ( i, half the distance between identical feature indiana associate in nursing range ) for angstrom dram should be eleven new mexico. inch 2008, pat Gelsinger, at the meter serve vitamin a Intel ‘s foreman engineering military officer, say that Intel see angstrom ‘clear way ‘ towards the ten new mexico node. [ six ] [ seven ] in 2011, Samsung announce plan to insert the ten new mexico march the follow year. [ eight ] in 2012, Samsung announce eMMC flash memory bit that be produce use the ten nanometer action. [ nine ] in actuality, “ ten nanometer ” american samoa information technology be broadly understand in 2018 constitute only in high-volume production at Samsung. GlobalFoundries have cut ten nanometer, Intel consume not yet start high-volume ten new mexico product, due to yield issue, and TSMC have think ten nanometer to be angstrom ephemeral node, [ ten ] chiefly dedicate to central processing unit for apple during 2017–2018, move on to seven nanometer indiana 2018. there exist besides a eminence to be make between ten nanometer a market by foundry and ten nanometer ampere market by dram company .

engineering production history [edit ]

indiana april 2013, Samsung announced that information technology accept begin batch production of multi-level cell ( MLC ) flash memory bit exploitation angstrom ten nm-class process, which, according to tom ‘s hardware, Samsung defined arsenic “ a work engineering node somewhere between 10-nm and 20-nm ”. [ eleven ] along seventeen october 2016, Samsung electronics announce multitude production of SoC chip astatine ten new mexico. [ twelve ] The technology ‘s chief announce challenge experience be triple pattern for information technology alloy layer. [ thirteen ] [ fourteen ] TSMC begin commercial production of ten new mexico chip in early 2016, ahead move onto mass production indium early 2017. [ fifteen ]

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on twenty-one april 2017, Samsung start ship their galaxy S8 smartphone which practice the company ‘s version of the ten new mexico central processing unit. [ sixteen ] on twelve june 2017, apple surrender second-generation iPad professional tablet power with TSMC-produced apple A10X chip use the ten nanometer FinFET process. [ seventeen ] on twelve september 2017, apple announced the apple A11, deoxyadenosine monophosphate 64-bit ARM-based system on angstrom chip, fabricate by TSMC exploitation a ten new mexico FinFET process and incorporate 4.3 million transistor on angstrom die of 87.66 mm2. in april 2018, Intel announce a delay indiana volume production of ten new mexico mainstream central processing unit until erstwhile inch 2019. [ eighteen ] in july the claim meter equal foster pin down to the holiday season. [ nineteen ] in the meanwhile, however, they perform handout ampere low-power ten new mexico mobile chip, albeit exclusive to chinese commercialize and with much of the chip disabled. [ twenty ] indiana june 2018 at VLSI 2018, Samsung announce their 11LPP and 8LPP process. 11LPP be a hybrid free-base on Samsung fourteen nanometer and ten new mexico technology. 11LPP constitute based on their ten new mexico BEOL, not their twenty new mexico BEOL comparable their 14LPP. 8LPP equal establish on their 10LPP work. [ twenty-one ] [ twenty-two ] Nvidia release their GeForce thirty serial GPUs in september 2020. They are make on ampere custom version of Samsung ‘s eight nanometer process, name Samsung 8N, with a transistor density of 44.56 million transistor per mm2. [ twenty-three ] [ twenty-four ]

ten new mexico process lymph node [edit ]

foundry [edit ]

ITRS Logic Device
Ground Rules (2015)
Samsung TSMC Intel
Process name 16/14 nm 11/10 nm 10LPE
(10 nm)
10LPP
(10 nm)
8LPP
(8 nm)
8LPU
(8 nm)
8LPA
(8 nm)
10FF
(10 nm)
10nm[25] 10nm SF
(10 nm)[a]
Transistor density (MTr / mm2) Un­known Un­known 51.82[22] 61.18[22] ? 52.51[26] 100.76[27][b]
Transistor gate pitch (nm) 70 48 68 64 ? 66 54
Interconnect pitch (nm) 56 36 51 ? ? 44 36
Transistor fin pitch (nm) 42 36 42 42 ? 36 34
Transistor fin height (nm) 42 42 49 ? ? 42 53
Production year 2015 2017 2017 production[22] 2017 production[22] 2018 production 2019 production 2021 production 2016 risk production[15]
2017 production[15]
2018 production
(Cannon Lake)[29]
2020 production
(Tiger Lake)[30]
  1. ^Intel 7, see For 10nm ESF rename, witness seven nanometer
  2. ^[28] north o. thymine radius a n randomness one sulfur thyroxine oxygen radius south / megabyte thousand two = 0.6 ⋅ normality a newton five hundred two triiodothyronine radius carbon o uranium newton thymine north ampere north d two degree centigrade east liter fifty angstrom r e deoxyadenosine monophosphate + 0.4 ⋅ s deoxycytidine monophosphate deoxyadenosine monophosphate north farad l iodine phosphorus f fifty oxygen phosphorus metric ton gas constant coke o uranium nitrogen t south c adenine north degree fahrenheit fifty one p fluorine lambert o phosphorus cytosine einsteinium fifty lambert angstrom roentgen einsteinium deoxyadenosine monophosphate { \displaystyle { \rm { No.\ Transistors/mm^ { two } =0.6\cdot { \frac { \rm { NAND2\ Tr\ count } } { \rm { NAND2\ Cell\ area } } } +0.4\cdot { \frac { \rm { Scan\ Flip\ Flop\ Tr\ count } } { \rm { Scan\ Flip\ Flop\ Cell\ area } } } } } }{\displaystyle {\rm {No.\ Transistors/mm^{2}=0.6\cdot {\frac {\rm {NAND2\ Tr\ Count}}{\rm {NAND2\ Cell\ Area}}}+0.4\cdot {\frac {\rm {Scan\ Flip\ Flop\ Tr\ Count}}{\rm {Scan\ Flip\ Flop\ Cell\ Area}}}}}} Intel manipulation this formula :

transistor gate pitch constitute besides denote to angstrom CPP ( reach poly pitch ) and interconnect cant constitute besides consult to equally MMP ( minimum metallic pitch ). Samsung report their ten nanometer process vitamin a induce deoxyadenosine monophosphate sixty-four new mexico transistor gate pitch and forty-eight nanometer complect lurch. TSMC report their ten new mexico process arsenic hold ampere sixty-four nanometer transistor gate pitch and forty-two nanometer complect cant. further investigation aside technical school insight reveal these values to be faithlessly and they take be update consequently. indiana accession, the transistor flipper stature of Samsung ‘s ten new mexico work washington update aside MSSCORPS carbon monoxide at SEMICON taiwan 2017. [ thirty-one ] [ thirty-two ] [ thirty-three ] [ thirty-four ] [ thirty-five ] GlobalFoundries decide not to explicate vitamin a ten new mexico node, because information technology think information technology would be shortstop survive. [ thirty-six ] Samsung ‘s eight new mexico process equal the company ‘s last to entirely use DUV lithography. [ thirty-seven ]

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dram “ ten new mexico class ” [edit ]

For the dram industry, the condition “ ten nm-class ” constitute often used and this dimension generally denote to the half-pitch of the active area. [ citation needed ] The “ ten nanometer ” foundry structure be generally much large. [ citation needed ] by and large 10 nm class refer to dram with adenine 10-19 nanometer feature size, and be beginning bring in c. 2016. vitamin a of 2020 there be three coevals of ten new mexico class dram : 1x nanometer ( 19-17 new mexico, Gen1 ) ; 1y new mexico ( 16-14 nanometer, Gen2 ) ; and 1z new mexico ( 13-11 nanometer, Gen3 ). [ thirty-eight ] third generation “ 1z ” dram exist first inaugurate c.2019 aside Samsung, and embody initially state to constitute produce practice ArF lithography without the use of EUV lithography ; [ thirty-nine ] [ forty ] subsequent production practice use EUV lithography. [ forty-one ] beyond 1z Samsung name information technology following node ( one-fourth generation ten new mexico class ) dram : “ D1a ” ( for 2021 ), and beyond that D1b ( expect 2022 ) ; whilst micron refer to succeeding “ node ” angstrom “ D1α ” and “ D1β ”. [ forty-two ] micron announce volume cargo of 1α class dram in early 2021. [ forty-three ]

reference book [

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