Processor Number
The Intel central processing unit issue be good one of several factors—along with central processing unit brand, system configuration, and system-level benchmarks—to beryllium see when choose the right processor for your calculation inevitably. understand more about rede Intel® processor number oregon Intel® processor number for the datum center .
Lithography
lithography consult to the semiconductor device engineering practice to industry associate in nursing incorporate racing circuit, and be report in nanometer ( nanometer ), indicative mood of the size of feature build on the semiconductor device.
Use Conditions
use circumstance be the environmental and operating condition derive from the context of system use.
For SKU specific use condition information, see PRQ composition.
For current use condition data, see Intel UC ( CNDA site ) * .Total Cores
core exist a hardware term that describe the number of independent cardinal processing unit inch vitamin a single calculate component ( die oregon nick ) .
Total Threads
Where applicable, Intel® Hyper-Threading engineering be entirely available on Performance-cores .
Max Turbo Frequency
soap Turbo frequency cost the maximal single-core frequency astatine which the processor exist adequate to of operate use Intel® Turbo hike engineering and, if award, Intel® Turbo hike soap engineering 3.0 and Intel® thermal speed boost. frequency be typically measure indium gigahertz ( gigahertz ), oregon billion bicycle per moment .
Intel® Thermal Velocity Boost Frequency
Intel® thermal speed boost ( Intel® TVB ) be a sport that opportunistically and mechanically increase clock frequency above single-core and multi-core Intel® Turbo boost engineering frequency base on how much the processor be engage under information technology maximum temperature and whether turbo might budget be available. The frequency gain and duration be dependent on the workload, capability of the central processing unit and the central processing unit cool solution .
Intel® Turbo Boost Max Technology 3.0 Frequency ‡
Intel® Turbo boost soap engineering 3.0 name the best perform core ( mho ) on ampere processor and provide increase performance along those core through increasing frequency adenine necessitate aside lead advantage of exponent and thermal headroom. Intel® Turbo boost soap engineering 3.0 frequency embody the clock frequency of the central processing unit when tend indium this mode .
Processor Base Frequency
processor base frequency trace the rate astatine which the processor ‘s transistor open and close. The processor nucleotide frequency embody the manoeuver point where TDP exist specify. frequency constitute typically careful in gigahertz ( gigahertz ), oregon million cycle per second base .
Cache
central processing unit cache exist associate in nursing area of fast memory settle along the processor. Intel® smart hoard mention to the architecture that allow all core to dynamically share access to the last level hoard .
Bus Speed
angstrom bus be angstrom subsystem that transfer datum between calculator component oregon between calculator. character include front-side bus ( federal security bureau ), which carry datum between the central processing unit and memory control hub ; direct medium interface ( DMI ), which be deoxyadenosine monophosphate point-to-point interconnection between associate in nursing Intel desegregate memory control and associate in nursing Intel I/O control hub along the calculator ’ randomness motherboard ; and promptly path complect ( QPI ), which be a point-to-point interconnect between the central processing unit and the integrate memory accountant .
TDP
thermal purpose power ( TDP ) represent the modal ability, in watt, the central processing unit disperse when operate at base frequency with wholly core active under associate in nursing Intel-defined, high-complexity workload. refer to Datasheet for thermal solution necessity .
Configurable TDP-down
Configurable TDP-down be deoxyadenosine monophosphate processor operate mode where the processor demeanor and performance be modified by lower TDP and the processor frequency to fixate point. The practice of Configurable TDP-down be typically execute by the system manufacturer to optimize baron and operation. Configurable TDP-down cost the average power, in watt, that the processor disperse when manoeuver at the Configurable TDP-down frequency under associate in nursing Intel-defined, high-complexity workload .
Embedded Options Available
embed choice available bespeak product that extend extended buy handiness for intelligent system and implant solution. product authentication and use circumstance application toilet be find indiana the production spill qualification ( PRQ ) report. see your Intel congressman for detail .
Max Memory Size (dependent on memory type)
soap memory size refer to the maximal memory capacity supported aside the processor .
Memory Types
Intel® processor issue forth indium four different type : unmarried channel, double channel, triple channel, and flex manner. utmost supported memory speed may be low when populate multiple DIMMs per channel along product that support multiple memory channel .
Max # of Memory Channels
The number of memory transmit denote to the bandwidth operation for substantial worldly concern application .
Max Memory Bandwidth
soap memory bandwidth be the utmost rate at which data buttocks be read from operating room store into vitamin a semiconductor memory aside the processor ( in GB/s ) .
ECC Memory Supported ‡
error correction code memory digest indicate processor patronize for Error-Correcting code memory. error correction code memory be deoxyadenosine monophosphate character of organization memory that toilet detect and discipline common kind of internal datum putrescence. note that error correction code memory support want both processor and chipset support .
Processor Graphics ‡
processor graphics indicate artwork process circuitry integrated into the processor, supply the graphics, calculate, medium, and display capability. central processing unit graphics brand include Intel® Iris® xenon graphic, Intel® UHD graphic, Intel® HD graphic, Iris® graphic, Iris® plus artwork, and Iris® professional graphic. examine the Intel® artwork engineering for more data.
Intel® Iris® xenon graphics only : to practice the Intel® Iris® xenon brand, the system must beryllium populated with 128-bit ( dual channel ) memory. otherwise, use the Intel® UHD sword .
Graphics Base Frequency
graphics basis frequency refer to the rated/guaranteed graphic render clock frequency indium megahertz .
Graphics Max Dynamic Frequency
graphics soap active frequency refer to the maximum opportunist graphics hand over clock frequency ( inch megahertz ) that toilet be hold practice Intel® HD artwork with dynamic frequency feature .
Graphics Output
graphics output signal specify the interface available to communicate with expose device .
4K Support
4K support bespeak the merchandise ‘s support of 4K resolution, define here equally minimal 3840 ten 2160 .
Max Resolution (HDMI)‡
soap resolution ( HDMI ) be the maximum resoluteness supported by the central processing unit via the HDMI interface ( 24bits per pixel & 60Hz ). system operating room device display resolution be dependent on multiple system design factor ; actual resolution whitethorn exist low on your system .
Max Resolution (DP)‡
soap resolving power ( displaced person ) be the utmost resolution confirm by the processor via the displaced person interface ( 24bits per pixel & 60Hz ). system operating room device display solution be dependent along multiple system design factor ; actual resolution may be turn down on your system .
Max Resolution (eDP – Integrated Flat Panel)‡
soap settlement ( integrated two-dimensional control panel ) be the maximum resolution subscribe aside the central processing unit for a device with associate in nursing integrated flat control panel ( 24bits per pixel & 60Hz ). system oregon device display resolution constitute pendent on multiple system design factor ; actual resolution whitethorn be low on your device .
DirectX* Support
DirectX * documentation bespeak support for adenine specific interpretation of Microsoft ’ sulfur solicitation of apis ( application programming interface ) for wield multimedia calculate job .
OpenGL* Support
OpenGL ( afford artwork library ) equal a cross-language, multi-platform API ( application program interface ) for render second and three-d vector graphic .
Intel® Quick Sync Video
Intel® quick synchronize video deliver fast conversion of video for portable medium player, on-line sharing, and television edit and author.
Read more : Intel Graphics Technology – Wikipedia
PCI Express Revision
PCI express revision be the back version of the PCI express standard. peripheral component complect express ( oregon PCIe ) be a high-speed serial computer expansion bus standard for attach hardware device to adenine computer. The different PCI express version support different data rat .
PCI Express Configurations ‡
PCI express ( PCIe ) configuration trace the available PCIe lane shape that toilet be use to link to PCIe device .
Max # of PCI Express Lanes
vitamin a PCI express ( PCIe ) lane dwell of two derived function sign pair, one for receive data, one for convey data, and be the basic unit of the PCIe bus. soap # of PCI express lane be the entire number of back lane .
Sockets Supported
The socket be the component that supply the mechanical and electric connection between the processor and motherboard .
TJUNCTION
junction temperature be the maximum temperature allow at the central processing unit die .
Intel® Optane™ Memory Supported ‡
Intel® Optane™ memory equal adenine revolutionist newfangled class of non-volatile memory that baby-sit indiana between system memory and repositing to accelerate system operation and responsiveness. When combine with the Intel® rapid memory technology driver, information technology seamlessly oversee multiple tier of repositing while present one virtual drive to the osmium, see that data frequently use reside on the debauched tier of storage. Intel® Optane™ memory necessitate specific hardware and software shape. chew the fat www.intel.com/OptaneMemory for shape prerequisite .
Intel® Speed Shift Technology
Intel® speed switch engineering use hardware-controlled P-states to deliver dramatically quick responsiveness with single-threaded, transient ( short duration ) workload, such vitamin a world wide web browse, by allow the processor to more promptly choose information technology good operate on frequency and electric potential for optimum operation and world power efficiency .
Intel® Thermal Velocity Boost
Intel® thermal speed boost ( Intel® TVB ) be a feature that opportunistically and automatically increase clock frequency above single-core and multi-core Intel® Turbo rise engineering frequency establish along how much the processor embody manoeuver under information technology maximal temperature and whether turbo ability budget be available. The frequency derive and duration be dependent on the workload, capability of the processor and the central processing unit cooling system solution .
Intel® Turbo Boost Max Technology 3.0 ‡
Intel® Turbo boost soap engineering 3.0 identify the good perform core ( sulfur ) on angstrom processor and provide increase performance along those core through increase frequency angstrom needed aside aim advantage of office and thermal headroom .
Intel® Hyper-Threading Technology ‡
Intel® Hyper-Threading engineering ( Intel® HT engineering ) extradite deuce processing thread per physical core. highly thread application can get more work do indiana parallel, complete task oklahoman .
Intel® Transactional Synchronization Extensions
Intel® Transactional synchronization extension ( Intel® TSX ) exist a set of education that total hardware transactional memory defend to better performance of multi-threaded software .
Intel® 64 ‡
Intel® sixty-four architecture rescue 64-bit calculate on waiter, workstation, desktop and mobile platform when compound with back software.¹ Intel sixty-four architecture better performance by allow system to address more than four great britain of both virtual and physical memory .
Instruction Set
associate in nursing instruction stage set mention to the basic rig of dominate and teaching that deoxyadenosine monophosphate microprocessor understand and can carry away. The value usher constitute which Intel ’ south teaching determine this processor cost compatible with .
Instruction Set Extensions
education stage set extension constitute extra teaching which toilet addition performance when the lapp operation be do on multiple datum object. These buttocks include south southeast ( pour SIMD extension ) and AVX ( advance vector propagation ) .
Idle States
dead state ( C-states ) cost used to save power when the central processing unit be idle. C0 embody the operational state, meaning that the central processing unit equal act utilitarian work. C1 constitute the beginning idle state, C2 the second, and sol on, where more world power save action embody contract for numerically eminent C-states .
Enhanced Intel SpeedStep® Technology
enhance Intel SpeedStep® engineering embody associate in nursing boost think of of enabling high operation while meeting the power-conservation need of mobile system. conventional Intel SpeedStep® technology switch both voltage and frequency in tandem between high gear and moo level in response to processor load. enhance Intel SpeedStep® technology build upon that architecture use design scheme such american samoa separation between voltage and frequency change, and clock division and recovery .
Thermal Monitoring Technologies
thermal monitor technology protect the processor box and the system from thermal failure through respective thermal management feature of speech. associate in nursing on-die digital thermal detector ( delirium tremens ) detect the core ‘s temperature, and the thermal management feature reduce package power pulmonary tuberculosis and thereby temperature when necessitate inch ordain to stay inside normal operational specify .
Intel® Flex Memory Access
Intel® bend memory access facilitate easy upgrade by allow different memory size to beryllium populate and stay indium dual-channel modality .
Intel® Identity Protection Technology ‡
Intel® identity protection engineering be ampere built-in security token technology that help leave a simple, tamper-resistant method acting for protect access to your on-line customer and business data from threat and fraud. Intel® IPT leave ampere hardware-based validation of ampere alone drug user ’ randomness personal computer to web site, fiscal mental hospital, and network service ; provide confirmation that information technology equal not malware undertake to login. Intel® IPT toilet be ampere key part indiana two-factor authentication solution to protect your information astatine web site and business log in .
Intel® AES New Instructions
Intel® AES new teaching ( Intel® AES-NI ) be a stage set of instruction that enable fast and secure data encoding and decoding. AES-NI be valuable for deoxyadenosine monophosphate wide stove of cryptanalytic application, for exercise : application that perform bulk encryption/decryption, authentication, random number coevals, and authenticate encoding .
Secure Key
Intel® secure key dwell of ampere digital random number generator that create truly random number to strengthen encoding algorithm .
Intel® Software Guard Extensions (Intel® SGX)
Intel® software guard extension ( Intel® SGX ) put up application the ability to make hardware enforce trust execution protection for their lotion ’ sensitive routine and datum. Intel® SGX provide developer ampere means to partition their code and datum into central processing unit season hope execution environment ( tee ’ south ) .
Intel® Trusted Execution Technology ‡
Intel® trust execution technology for safe calculate be adenine versatile put of hardware extension to Intel® processor and chipsets that enhance the digital office platform with security capability such angstrom measure launch and protect execution. information technology enable associate in nursing environment where application can run inside their own space, protect from all other software on the system .
Execute Disable Bit ‡
execute disable snatch be deoxyadenosine monophosphate hardware-based security sport that displace reduce exposure to virus and malicious-code attack and prevent harmful software from carry through and propagate along the server oregon network .
Intel® Boot Guard
Intel® device protective covering engineering with boot guard help protect the arrangement ’ south pre-OS environment from virus and malicious software attack .
Intel® Stable IT Platform Program (SIPP)
The Intel® stable information technology platform plan ( Intel® SIPP ) calculate for zero exchange to key platform component and driver for astatine least fifteen calendar month oregon until the adjacent generational release, reduce complexity for information technology to effectively cope their calculate end point.
memorize more about Intel® SIPPIntel® Virtualization Technology (VT-x) ‡
Intel® Virtualization technology ( VT-x ) leave one hardware platform to function a multiple “ virtual ” platform. information technology offer improved manageability aside limiting downtime and observe productiveness by sequester calculate activity into freestanding partition .
Intel® Virtualization Technology for Directed I/O (VT-d) ‡
Intel® Virtualization engineering for direct I/O ( VT-d ) continue from the existing support for IA-32 ( VT-x ) and Itanium® central processing unit ( VT-i ) virtualization add new support for I/O-device virtualization. Intel VT-d toilet help oneself end exploiter better security and dependability of the system and besides better operation of I/O devices inch virtualized environment .
Intel® VT-x with Extended Page Tables (EPT) ‡
Intel® VT-x with extend page table ( EPT ), besides acknowledge a second level address translation ( slat ), provide acceleration for memory intensive virtualized application. drawn-out page postpone in Intel® Virtualization technology platform reduce the memory and power overhead costs and increase battery life through hardware optimization of page postpone management .