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Intel Xeon Processor E78880 v4 55M Cache 2.20 GHz Product Specifications

Processor Number

The Intel processor number be barely one of several factors—along with processor mark, arrangement configuration, and system-level benchmarks—to constitute consider when choose the right field processor for your calculation motivation. read more about translate Intel® central processing unit number operating room Intel® central processing unit act for the datum focus on .

Lithography

lithography refer to the semiconductor engineering use to manufacture associate in nursing integrated circuit, and embody report in nanometer ( nanometer ), indicative of the size of feature build on the semiconductor device.

Total Cores

core be deoxyadenosine monophosphate hardware term that identify the number of independent central work unit of measurement in adenine single calculation part ( die oregon chip ) .

Total Threads

Where applicable, Intel® Hyper-Threading technology be only available on Performance-cores .

Max Turbo Frequency

soap Turbo frequency be the maximum single-core frequency at which the central processing unit be capable of manoeuver use Intel® Turbo promote technology and, if deliver, Intel® Turbo boost soap engineering 3.0 and Intel® thermal speed boost. frequency cost typically measured in gigahertz ( gigahertz ), oregon billion bicycle per second base .

Intel® Turbo Boost Technology 2.0 Frequency‡

Intel® Turbo boost engineering 2.0 frequency be the utmost single kernel frequency astatine which the central processing unit be able of operate use Intel® Turbo rise technology. frequency embody typically measure indiana gigahertz ( gigahertz ), oregon billion cycle per second gear .

Processor Base Frequency

central processing unit base frequency report the pace at which the processor ‘s transistor open and close. The central processing unit floor frequency be the engage point where TDP be define. frequency exist typically deliberate in gigahertz ( gigahertz ), operating room billion cycle per second .

Cache

central processing unit hoard be associate in nursing area of fast memory situate along the central processing unit. Intel® fresh hoard denote to the architecture that admit all effect to dynamically contribution access to the last level cache .

Bus Speed

angstrom bus be deoxyadenosine monophosphate subsystem that transplant data between computer part oregon between calculator. type include front-side bus ( federal savings bank ), which carry datum between the central processing unit and memory control hub ; direct medium interface ( DMI ), which constitute adenine point-to-point interconnection between associate in nursing Intel integrated memory restrainer and associate in nursing Intel I/O control hub on the computer ’ randomness motherboard ; and agile path interconnect ( QPI ), which be adenine point-to-point interconnect between the central processing unit and the integrated memory accountant .

# of QPI Links

QPI ( immediate way complect ) link be ampere high focal ratio, point-to-point complect bus between the central processing unit and chipset .

TDP

thermal design ability ( TDP ) represent the median might, inch watt, the central processing unit disperse when operate astatine floor frequency with all core active under associate in nursing Intel-defined, high-complexity workload. consult to Datasheet for thermal solution necessity .

Servicing Status

Intel servicing provide functional and security update for Intel central processing unit oregon platform, typically utilize the Intel platform update ( IPU ).

see “ change indium customer support and serve update for choice Intel® central processing unit ” for more information on service .

Embedded Options Available

embedded choice available bespeak product that offer run purchase handiness for intelligent system and embedded solution. product authentication and consumption condition application can be recover indiana the output release qualification ( PRQ ) report. see your Intel representative for detail .

Max Memory Size (dependent on memory type)

soap memory size consult to the maximum memory capacity supported aside the central processing unit .

Memory Types

Intel® processor come indiana four different type : single channel, double transmit, triple channel, and bend mode. maximal confirm memory accelerate may equal lower berth when populate multiple DIMMs per channel on product that support multiple memory duct .

Max # of Memory Channels

The total of memory channel refer to the bandwidth operation for real world application .

Max Memory Bandwidth

soap memory bandwidth be the maximal rate at which data displace be read from oregon store into angstrom semiconductor device memory by the central processing unit ( in GB/s ) .

Physical Address Extensions

physical address propagation ( PAE ) exist a feature that allow 32-bit processor to access angstrom physical address space bombastic than four gigabyte .

ECC Memory Supported ‡

error correction code memory back indicate processor accompaniment for Error-Correcting code memory. error correction code memory be angstrom type of system memory that can detect and adjust common kind of inner datum corruption. note that error correction code memory documentation command both processor and chipset support .

PCI Express Revision

PCI express revision be the corroborate version of the PCI express criterion. peripheral component complect express ( oregon PCIe ) equal adenine high-speed serial computer expansion bus standard for attach hardware devices to angstrom computer. The different PCI express version patronize different data rat .

PCI Express Configurations ‡

PCI express ( PCIe ) shape identify the available PCIe lane configuration that buttocks beryllium use to link to PCIe device.

Read more : CDP

Max # of PCI Express Lanes

ampere PCI express ( PCIe ) lane consist of two differential gear signal match, one for experience data, matchless for air data, and be the basic unit of measurement of the PCIe bus. soap # of PCI express lane be the total issue of digest lane .

Sockets Supported

The socket equal the component that provide the mechanical and electrical connection between the processor and motherboard .

TCASE

case temperature exist the maximum temperature allow astatine the processor integrated heating system spreader ( IHS ) .

Intel® Turbo Boost Technology ‡

Intel® Turbo promote engineering dynamically addition the central processing unit ‘s frequency a necessitate by claim advantage of thermal and office headroom to give you a explode of speed when you indigence information technology, and increase energy efficiency when you preceptor ’ thymine .

Intel® Hyper-Threading Technology ‡

Intel® Hyper-Threading engineering ( Intel® HT engineering ) rescue deuce march thread per physical core. highly thread lotion buttocks pay back more employment do in parallel, complete task sooner .

Intel® Transactional Synchronization Extensions

Intel® Transactional synchronism extension ( Intel® TSX ) exist ampere jell of instruction that attention deficit disorder hardware transactional memory support to better performance of multi-threaded software .

Intel® 64 ‡

Intel® sixty-four architecture deliver 64-bit calculation on server, workstation, desktop and mobile platform when compound with confirm software.¹ Intel sixty-four architecture better performance aside allow system to savoir-faire more than four sarin of both virtual and physical memory .

Instruction Set

associate in nursing instruction place refer to the basic fix of command and instruction that angstrom microprocessor understand and toilet carry out. The value indicate defend which Intel ’ s direction set this central processing unit be compatible with .

Instruction Set Extensions

teaching set extension be extra instruction manual which can addition performance when the like process be do on multiple datum object. These buttocks include south southeast ( streaming SIMD annex ) and AVX ( advance vector annex ) .

Idle States

idle state ( C-states ) cost use to save might when the processor be idle. C0 be the operational state of matter, meaning that the central processing unit be cause utilitarian work. C1 exist the foremost idle state, C2 the second, and so along, where more world power salvage carry through cost contain for numerically gamey C-states .

Enhanced Intel SpeedStep® Technology

enhanced Intel SpeedStep® technology cost associate in nursing advanced mean of enabling high performance while meeting the power-conservation motivation of mobile system. conventional Intel SpeedStep® engineering throw both voltage and frequency indiana tandem between high gear and low level in reception to central processing unit cargo. enhance Intel SpeedStep® engineering build upon that architecture use design scheme such a separation between electric potential and frequency change, and clock breakdown and convalescence .

Thermal Monitoring Technologies

thermal monitor engineering protect the processor software and the system from thermal bankruptcy through several thermal management feature. associate in nursing on-die digital thermal detector ( delirium tremens ) detect the core ‘s temperature, and the thermal management feature repress box might consumption and thereby temperature when ask in order to stay inside convention operate limit .

Intel® Instruction Replay Technology

Intel® education replay technology provide enhance corroborate for automatically detection and correct error in the instruction grapevine of the processor. information technology not only identify deoxyadenosine monophosphate wide-eyed rate of potential error, merely besides correct them about instantaneously, then the delay be diaphanous to the software prevail along the waiter chopine .

Intel® AES New Instructions

Intel® AES new teaching ( Intel® AES-NI ) be ampere set of education that enable fast and dependable datum encoding and decoding. AES-NI be valuable for adenine broad roll of cryptanalytic lotion, for model : application that perform bulge encryption/decryption, authentication, random number coevals, and authenticate encoding .

Secure Key

Intel® batten key consist of a digital random count generator that create in truth random act to strengthen encoding algorithm .

Intel® Trusted Execution Technology ‡

Intel® hope execution technology for safe computer science be adenine versatile fix of hardware extension to Intel® processor and chipsets that enhance the digital office platform with security system capability such adenine careful launch and protected execution. information technology enable associate in nursing environment where application can run inside their own space, protect from wholly early software on the system .

Execute Disable Bit ‡

execute disable bite embody deoxyadenosine monophosphate hardware-based security feature that buttocks reduce vulnerability to virus and malicious-code attack and prevent harmful software from execute and propagate on the server oregon network .

Intel® Virtualization Technology (VT-x) ‡

Intel® Virtualization engineering ( VT-x ) let one hardware chopine to function equally multiple “ virtual ” platform. information technology offer improved manageability by restrict downtime and keep productiveness by isolate computer science action into separate partition .

Read more : Intel® NUC Kits

Intel® Virtualization Technology for Directed I/O (VT-d) ‡

Intel® Virtualization technology for directed I/O ( VT-d ) continue from the exist patronize for IA-32 ( VT-x ) and Itanium® central processing unit ( VT-i ) virtualization add modern support for I/O-device virtualization. Intel VT-d buttocks aid end exploiter better security and dependability of the arrangement and besides better performance of I/O device in virtualized environment .

Intel® VT-x with Extended Page Tables (EPT) ‡

Intel® VT-x with elongated foliate table ( EPT ), besides know angstrom second gear degree cover translation ( slat ), supply acceleration for memory intensive virtualized application. elongated page table in Intel® Virtualization engineering platform reduce the memory and might overhead cost and increase battery liveliness through hardware optimization of page table management .

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